[coreboot-gerrit] Change in ...coreboot[master]: northbridge: Remove unneeded include <pc80/mc146818rtc.h>

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30195


Change subject: northbridge: Remove unneeded include <pc80/mc146818rtc.h>
......................................................................

northbridge: Remove unneeded include <pc80/mc146818rtc.h>

Change-Id: Icae59721db530572d76035975a4e90686bf4fa65
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/northbridge/amd/amdfam10/link_control.c
M src/northbridge/amd/amdfam10/misc_control.c
M src/northbridge/amd/amdfam10/nb_control.c
M src/northbridge/amd/amdfam10/northbridge.c
M src/northbridge/intel/haswell/raminit.c
M src/northbridge/intel/pineview/raminit.c
M src/northbridge/intel/x4x/raminit.c
M src/northbridge/intel/x4x/raminit_ddr23.c
M src/northbridge/via/vx900/lpc.c
9 files changed, 0 insertions(+), 9 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/30195/1

diff --git a/src/northbridge/amd/amdfam10/link_control.c b/src/northbridge/amd/amdfam10/link_control.c
index f82f238..504e187 100644
--- a/src/northbridge/amd/amdfam10/link_control.c
+++ b/src/northbridge/amd/amdfam10/link_control.c
@@ -23,7 +23,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
 #include <cpu/amd/model_10xxx_rev.h>
 
 #include "amdfam10.h"
diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
index 8323c1e..8cd32df 100644
--- a/src/northbridge/amd/amdfam10/misc_control.c
+++ b/src/northbridge/amd/amdfam10/misc_control.c
@@ -28,7 +28,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
 #include <lib.h>
 #include <cbmem.h>
 #include <cpu/amd/model_10xxx_rev.h>
diff --git a/src/northbridge/amd/amdfam10/nb_control.c b/src/northbridge/amd/amdfam10/nb_control.c
index 255948d..a9bdb18 100644
--- a/src/northbridge/amd/amdfam10/nb_control.c
+++ b/src/northbridge/amd/amdfam10/nb_control.c
@@ -23,7 +23,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
 #include <cpu/amd/model_10xxx_rev.h>
 
 #include "amdfam10.h"
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 4da5228..7f6c0f9 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -37,7 +37,6 @@
 
 #if IS_ENABLED(CONFIG_LOGICAL_CPUS)
 #include <cpu/amd/multicore.h>
-#include <pc80/mc146818rtc.h>
 #endif
 
 #include "northbridge.h"
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 221d71f..faaa9d0 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -23,7 +23,6 @@
 #include <ip_checksum.h>
 #include <memory_info.h>
 #include <mrc_cache.h>
-#include <pc80/mc146818rtc.h>
 #include <device/pci_def.h>
 #include <device/dram/ddr3.h>
 #include <smbios.h>
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index f199d9b..512403f 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -22,7 +22,6 @@
 #include <lib.h>
 #include "pineview.h"
 #include "raminit.h"
-#include <pc80/mc146818rtc.h>
 #include <spd.h>
 #include <string.h>
 
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index c97c139..b3b84d8 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -29,7 +29,6 @@
 #include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */
 #endif
 #include "x4x.h"
-#include <pc80/mc146818rtc.h>
 #include <spd.h>
 #include <string.h>
 #include <device/dram/ddr2.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index 32fa0d9..5c5dafa 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -20,7 +20,6 @@
 #include <console/console.h>
 #include <commonlib/helpers.h>
 #include <delay.h>
-#include <pc80/mc146818rtc.h>
 #if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h>
 #else
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index b9dac56..27e2384 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -20,7 +20,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <pc80/i8259.h>
-#include <pc80/mc146818rtc.h>
 #include <drivers/generic/ioapic/chip.h>
 
 #include "vx900.h"

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icae59721db530572d76035975a4e90686bf4fa65
Gerrit-Change-Number: 30195
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas at noos.fr>
Gerrit-MessageType: newchange
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