Author: wmb Date: Wed Oct 12 02:30:09 2011 New Revision: 2593 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2593
Log: OLPC XO-1.75 - Eliminated hardcoded DRAM physical addresses. In conjunction with a change to CForth, this should permit automatic support of different memory sizes.
Modified: cpu/arm/mmp2/mmuon.fth cpu/arm/mmp2/rootnode.fth cpu/arm/olpc/1.75/addrs.fth cpu/arm/olpc/1.75/devices.fth cpu/arm/olpc/1.75/fw.bth cpu/arm/olpc/1.75/lcd.fth cpu/arm/olpc/1.75/prefw.bth cpu/arm/olpc/1.75/probemem.fth cpu/arm/olpc/initmmu.fth cpu/arm/olpc/resetvec.bth
Modified: cpu/arm/mmp2/mmuon.fth ============================================================================== --- cpu/arm/mmp2/mmuon.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/mmp2/mmuon.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -9,9 +9,11 @@ mov tos,tos,lsl #14 c;
+: (page-table-va) fw-mem-va page-table-offset + ; +' (page-table-va) to page-table-va
: map-section ( pa+mode va -- ) - d# 18 rshift page-table@ + tuck l! clean-d$-entry + d# 18 rshift page-table-va + tuck l! clean-d$-entry ; : map-sections ( pa mode va size -- ) 2>r + 2 or 2r> ( pa+mode va size ) @@ -22,6 +24,7 @@ drop ;
+[ifdef] notdef : ofw-sections ( -- ) h# 0000.0000 h# c0e over dma-mem-pa map-sections \ Cache and write bufferable dma-mem-pa h# c02 over /dma-mem map-sections \ Non-cacheable DMA space @@ -34,14 +37,6 @@ h# e000.0000 h# c02 over /section map-sections \ Audio SRAM - no caching or buffering ;
-: setup-sections - page-table-pa page-table! - page-table-pa /page-table erase - - ofw-sections -; -\ Do we need to map SRAM and DDRC ? - code start-mmu set r2, 0xFFFFFFFF \ Set domains for Manager access mcr p15,0,r2,3,0,0 \ Update register 3 in CP15 @@ -67,10 +62,21 @@ sub pc, pc, #4 c;
+: setup-sections + ['] page-table@ to page-table-va + page-table-pa dup page-table! /page-table erase + + ofw-sections + ['] (page-table-va) to page-table-va + start-mmu +; +[then] + : go-fast control@ 1 and if exit then \ Don't do this if MMU is already on +[ifdef] notdef setup-sections - start-mmu +[then] dcache-on icache-on \ l2cache-on \ Leave off for now, to avoid potential problems with Linux
Modified: cpu/arm/mmp2/rootnode.fth ============================================================================== --- cpu/arm/mmp2/rootnode.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/mmp2/rootnode.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -26,14 +26,15 @@
: map-in ( phys size -- virt ) drop ( phys ) - dup fb-mem-pa = if drop fb-mem-va exit then ( phys ) + \ The display driver uses fb-mem-va directly instead of calling map-in + \ dup fb-mem-va >physical = if drop fb-mem-va exit then ( phys ) io-pa - io-va + ; : map-out ( virtual size -- ) 2drop ;
-: dma-range ( -- start end ) dma-mem-pa dup /dma-mem + ; +: dma-range ( -- start end ) dma-mem-va >physical dup /dma-mem + ;
h# 0 constant dma-map-mode \ XXX what should this be?
@@ -92,7 +93,10 @@ mmu-map ( ) r> ( virt ) [else] - nip + nip ( phys ) +[ifdef] dma-mem-va + dma-mem-va >physical - dma-mem-va + ( virt ) +[then] [then] ; : dma-free ( virt size -- ) @@ -102,21 +106,30 @@ ( virt size phys ) -rot tuck ( phys size virt size ) 2dup mmu-unmap mmu-release ( phys size ) +[else] +[ifdef] >physical + swap >physical swap ( virt ) +[then] [then] mem-release ( ) ;
: dma-map-in ( virt size cacheable -- devaddr ) - drop 2dup flush-d$-range drop ( virt ) + drop ( virt size ) + 2dup flush-d$-range ( virt size ) + drop ( virt ) +[ifdef] >physical + >physical ( phys ) +[then] ; : dma-map-out ( virt devaddr size -- ) nip flush-d$-range ;
\ : dma-sync ( virt devaddr size -- ) nip flush-d$-range ; \ : dma-push ( virt devaddr size -- ) nip flush-d$-range ; \ : dma-pull ( virt devaddr size -- ) nip flush-d$-range ; -: dma-sync ( virt devaddr size -- ) 3drop ; +: dma-sync ( virt devaddr size -- ) 3drop d# 30 us ; : dma-push ( virt devaddr size -- ) 3drop ; -: dma-pull ( virt devaddr size -- ) 3drop ; +: dma-pull ( virt devaddr size -- ) 3drop d# 30 us ;
finish-device
Modified: cpu/arm/olpc/1.75/addrs.fth ============================================================================== --- cpu/arm/olpc/1.75/addrs.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/1.75/addrs.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -2,24 +2,12 @@
fload ${BP}/cpu/arm/mmuparams.fth
-h# 2000.0000 constant /ram-total \ Total size of memory - h# 0040.0000 constant /fb-mem \ The screen uses a little more than 3 MiB at 1200x900x24 -/ram-total /fb-mem - constant fb-mem-pa \ e.g. h# 1fc0.0000 - -fb-mem-pa constant /available-mem - -: (memory?) ( phys -- flag ) /ram-total u< ;
\ OFW implementation choices -h# 0020.0000 constant /fw-mem -fb-mem-pa /fw-mem - constant fw-mem-pa \ e.g. h# 1fa0.0000 - -h# 0020.0000 constant /extra-mem -fw-mem-pa /extra-mem - constant extra-mem-pa \ e.g. h# 1f80.0000 - -h# 0080.0000 constant /dma-mem -extra-mem-pa /dma-mem - constant dma-mem-pa \ e.g. h# 1f00.0000 +h# 0020.0000 constant /fw-mem +h# 0020.0000 constant /extra-mem +h# 0080.0000 constant /dma-mem
h# fd00.0000 constant dma-mem-va h# fd80.0000 constant extra-mem-va @@ -39,7 +27,7 @@ /fw-mem /page-table - constant page-table-offset page-table-offset constant stack-offset \ Stack is below this
-fw-mem-pa page-table-offset + constant page-table-pa +\ fw-mem-pa page-table-offset + constant page-table-pa
\ h# 0110.0000 constant def-load-base h# 0800.0000 constant def-load-base
Modified: cpu/arm/olpc/1.75/devices.fth ============================================================================== --- cpu/arm/olpc/1.75/devices.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/1.75/devices.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -242,14 +242,17 @@ init-lcd ; : map-frame-buffer ( -- ) - fb-mem-pa /fb-mem " map-in" $call-parent to frame-buffer-adr + \ We use fb-mem-va directly instead of calling map-in on the physical address + \ because the physical address changes with the total memory size. The early + \ assembly language startup code establishes the mapping. + fb-mem-va to frame-buffer-adr ; " display" device-type " ISO8859-1" encode-string " character-set" property 0 0 encode-bytes " iso6429-1983-colors" property
\ Used as temporary storage for images by $get-image - : graphmem ( -- adr ) dimensions * pixel* fb-mem-pa + ; + : graphmem ( -- adr ) dimensions * pixel* fb-mem-va + ;
: display-install ( -- ) map-frame-buffer @@ -287,8 +290,6 @@ fload ${BP}/dev/olpc/kb3700/spicmd.fth fload ${BP}/cpu/arm/olpc/spcmd.fth
-devalias keyboard /ec-spi/keyboard - : wlan-reset ( -- ) d# 58 gpio-clr d# 20 ms d# 58 gpio-set ;
\ Create the alias unless it already exists
Modified: cpu/arm/olpc/1.75/fw.bth ============================================================================== --- cpu/arm/olpc/1.75/fw.bth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/1.75/fw.bth Wed Oct 12 02:30:09 2011 (r2593) @@ -72,12 +72,12 @@
\ Each of these groups is a struct map_desc as defined in arch/arm/include/asm/mach/ extra-mem-va tag-l, \ VA of OFW memory - extra-mem-pa pageshift rshift tag-l, \ Page frame number of OFW memory + dup >physical pageshift rshift tag-l, \ Page frame number of OFW memory fw-mem-va /fw-mem + extra-mem-va - tag-l, \ Size of OFW memory MT_MEMORY tag-l, \ Mapping type of OFW memory
fb-mem-va tag-l, \ VA of OFW Frame Buffer - fb-mem-pa pageshift rshift tag-l, \ PA of OFW Frame Buffer + dup >physical pageshift rshift tag-l, \ PA of OFW Frame Buffer /fb-mem tag-l, \ Size of OFW memory MT_DEVICE_WC tag-l, \ Mapping type of OFW frame buffer ;
Modified: cpu/arm/olpc/1.75/lcd.fth ============================================================================== --- cpu/arm/olpc/1.75/lcd.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/1.75/lcd.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -16,7 +16,7 @@ lcd-clocks-on
0 h# 190 lcd! \ Disable LCD DMA controller - fb-mem-pa h# f4 lcd! \ Frame buffer area 0 + fb-mem-va >physical h# f4 lcd! \ Frame buffer area 0 0 h# f8 lcd! \ Frame buffer area 1 hdisp bytes/pixel * h# fc lcd! \ Pitch in bytes
Modified: cpu/arm/olpc/1.75/prefw.bth ============================================================================== --- cpu/arm/olpc/1.75/prefw.bth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/1.75/prefw.bth Wed Oct 12 02:30:09 2011 (r2593) @@ -12,7 +12,6 @@ ' noop is include-hook
fload ${BP}/cpu/arm/olpc/1.75/config.fth -' (memory?) to memory?
: headerless ; : headers ; : headerless0 ;
@@ -33,37 +32,38 @@ fload ${BP}/ofw/core/memlist.fth \ Resource list common routines fload ${BP}/ofw/core/showlist.fth \ Linked list display tool
-fload ${BP}/cpu/arm/mmp2/rootnode.fth \ Root node mapping - physical mode -dev / - " olpc,XO-1.75" model - " Marvell,Armada 610" encode-string " architecture" property -\ The clock frequency of the root bus may be irrelevant, since the bus is internal to the SOC -\ d# 1,000,000,000 " clock-frequency" integer-property -device-end - -: (cpu-arch ( -- adr len ) - " architecture" ['] root-node get-package-property drop - get-encoded-string -; -' (cpu-arch to cpu-arch - \ Memory management services [ifdef] virtual-mode fload ${BP}/ofw/core/clntmem1.fth \ client services for memory [else] fload ${BP}/ofw/core/clntphy1.fth \ client services for memory -defer section-table +defer page-table-va : >physical ( va -- pa ) dup d# 20 rshift ( va section-index ) - section-table swap la+ l@ ( va pte ) + page-table-va swap la+ l@ ( va pte ) h# fffff invert and ( va pa-base ) swap h# fffff and or ( pa ) ; [then]
+fload ${BP}/cpu/arm/mmp2/rootnode.fth \ Root node mapping - physical mode + fload ${BP}/ofw/core/allocph1.fth \ S Physical memory allocator fload ${BP}/ofw/core/availpm.fth \ Available memory list
+dev / + " olpc,XO-1.75" model + " Marvell,Armada 610" encode-string " architecture" property +\ The clock frequency of the root bus may be irrelevant, since the bus is internal to the SOC +\ d# 1,000,000,000 " clock-frequency" integer-property +device-end + +: (cpu-arch ( -- adr len ) + " architecture" ['] root-node get-package-property drop + get-encoded-string +; +' (cpu-arch to cpu-arch + fload ${BP}/cpu/arm/olpc/1.75/probemem.fth \ Memory probing
stand-init: Probing memory @@ -79,7 +79,6 @@ fload ${BP}/arch/arm/loadarea.fth \ Allocate and map program load area [else] fload ${BP}/cpu/arm/mmp2/mmuon.fth -' page-table@ to section-table [then]
\ XXX should be elsewhere
Modified: cpu/arm/olpc/1.75/probemem.fth ============================================================================== --- cpu/arm/olpc/1.75/probemem.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/1.75/probemem.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -3,6 +3,9 @@
" /memory" find-device
+: (memory?) ( phys -- flag ) fb-mem-va >physical u< ; +' (memory?) to memory? + headerless
h# ffff.ffff value low @@ -16,15 +19,16 @@
headers : probe ( -- ) - 0 /available-mem log&release + 0 fb-mem-va >physical /fb-mem + log&release
0 0 encode-bytes ( adr 0 ) physavail ['] make-phys-memlist find-node ( adr len prev 0 ) 2drop " reg" property
- \ Claim the memory used by OFW - fw-mem-pa /fw-mem 0 claim drop - extra-mem-pa /extra-mem 0 claim drop + \ Claim the memory already in use + fb-mem-va >physical /fb-mem 0 claim drop + fw-mem-va >physical /fw-mem 0 claim drop + extra-mem-va >physical /extra-mem 0 claim drop
0 pagesize 0 claim drop \ Vector table ;
Modified: cpu/arm/olpc/initmmu.fth ============================================================================== --- cpu/arm/olpc/initmmu.fth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/initmmu.fth Wed Oct 12 02:30:09 2011 (r2593) @@ -204,12 +204,61 @@ mov pc, lr end-code
+\ Map sections within the given address range, using +\ the given protection/cacheability mode. pt-adr is the page table base address. +label allocate-and-map-sections ( r0: pt-adr, r1: padr-top, r2: len, r3: mode r4: vadr -- r1: padr-bot ) + inc r4, r2 \ vadr-top + add r1, r1, r3 \ PA+mode + begin + dec r1, #0x100000 + dec r4, #0x100000 + + str r1, [r0, r4, lsr #18] + + decs r2, #0x100000 + 0<= until + + mov r1,r1,lsr #20 \ Clear out mode bits in padr + mov r1,r1,lsl #20 + + mov pc, lr +end-code + +\ This assumes that there are no holes and that unused MMAP registers have CS_VALID=0 +label dramsize ( -- r0: size-in-bytes ) + mov r0,0 + mov r1,0xd0000000 \ Memory controller base address + + ldr r2,[r1,#0x100] \ MMAP0 register + ands r3,r2,#1 \ Test CS_VALID + movne r3,#0x10000 \ Scale factor for memory size + movne r2,r2,lsl #12 \ Clear high bits above AREA_LENGTH field + movne r2,r2,lsr #28 \ Move AREA_LENGTH to LSB + addne r0,r0,r3,lsl r2 \ Compute bank size and add to accumulator + + ldr r2,[r1,#0x110] \ MMAP1 register + ands r3,r2,#1 \ Test CS_VALID + movne r3,#0x10000 \ Scale factor for memory size + movne r2,r2,lsl #12 \ Clear high bits above AREA_LENGTH field + movne r2,r2,lsr #28 \ Move AREA_LENGTH to LSB + addne r0,r0,r3,lsl r2 \ Compute bank size and add to accumulator + + mov pc,lr +end-code + \ Initial the section table, setting up mappings for the platform-specific \ address ranges that the firmware uses. \ Destroys: r0-r4 -label init-map ( r0: section-table -- ) +label init-map ( -- ) mov r10,lr
+ bl `dramsize` \ r0: total-memory-size + mov r1,r0 \ r1: allocation pointer starts at top of DRAM + + \ Locate the page table at the top of the firmware memory, just below the frame buffer + dec r0,`/fb-mem #` \ Size of frame buffer + dec r0,`/page-table #` \ r0: page-table-pa + mcr p15,0,r0,cr2,cr0,0 \ Set table base address
\ Clear the entire section table for starters @@ -219,32 +268,33 @@ subs r2, r2, #1 \ Decrement section number str r3, [r0, r2, lsl #2] \ Invalidate section entry 0= until + \ r1: top of DRAM + set r2,`/fb-mem #` \ Size of frame buffer + set r3,#0xc06 \ Write bufferable + set r4,`fb-mem-va #` \ Virtual address + bl `allocate-and-map-sections \ r1: bottom PA of frame buffer
- mov r1,0 \ Address of low memory - set r2,`dma-mem-pa #` \ Size of low memory - up to dma-base - set r3,#0xc0e \ Cache and write bufferable - bl `map-sections-v=p` - - set r1,`dma-mem-pa #` \ Address of DMA area - set r2,`/dma-mem #` \ Size of DMA area - set r3,#0xc02 \ No caching or write buffering - bl `map-sections-v=p` + set r2,`/fw-mem #` \ Size of firmware region + set r3,#0xc0e \ Write bufferable + set r4,`fw-mem-va #` \ Virtual address + bl `allocate-and-map-sections` \ r1: bottom PA of firmware memory
- set r1,`extra-mem-pa #` \ Address of additional allocatable memory set r2,`/extra-mem #` \ Size of additional allocatable memory set r3,#0xc0e \ Write bufferable - bl `map-sections-v=p` + set r4,`extra-mem-va #' \ Virtual address + bl `allocate-and-map-sections` \ r1: bottom PA of extra memory
- set r1,`fw-mem-pa #` \ Address of Firmware region - set r2,`/fw-mem #` \ Size of firmware region - set r3,#0xc0e \ Write bufferable - bl `map-sections-v=p` + set r2,`/dma-mem #` \ Size of DMA area + set r3,#0xc02 \ No caching or write buffering + set r4,`dma-mem-va #` \ Virtual address + bl `allocate-and-map-sections` \ r1: bottom PA of DMA memory
- set r1,`fb-mem-pa #` \ Address - Frame buffer - set r2,`/fb-mem #` \ Size of frame buffer - set r3,#0xc06 \ Write bufferable - bl `map-sections-v=p` + mov r2,r1 \ Size of low memory + set r3,#0xc0e \ Cache and write bufferable + mov r4,#0 \ Virtual address + bl `allocate-and-map-sections` \ r1: 0
+ \ Now we have mapped all of DRAM set r1,`sram-pa #` \ Address of SRAM set r2,`/sram #` \ Size of SRAM set r3,#0xc02 \ No caching or write buffering @@ -260,40 +310,12 @@ set r3,#0xc02 \ No caching or write buffering bl `map-sections-v=p`
- set r1,`dma-mem-pa #` \ Address of DMA area - set r2,`/dma-mem #` \ Size of DMA area - set r3,#0xc02 \ No caching or write buffering - set r4,`dma-mem-va #` \ Virtual address - bl `map-sections` - - set r1,`fb-mem-pa #` \ Address - Frame buffer - set r2,`/fb-mem #` \ Size of frame buffer - set r3,#0xc06 \ Write bufferable - set r4,`fb-mem-va #` \ Virtual address - bl `map-sections - - set r1,`extra-mem-pa #` \ Address of additional allocatable memory - set r2,`/extra-mem #` \ Size of additional allocatable memory - set r3,#0xc0e \ Write bufferable - set r4,`extra-mem-va #' \ Virtual address - bl `map-sections` - - set r1,`fw-mem-pa #` \ Address of Firmware region - set r2,`/fw-mem #` \ Size of firmware region - set r3,#0xc0e \ Write bufferable - set r4,`fw-mem-va #` \ Virtual address - bl `map-sections` - set r1,`io-pa #` \ Address of I/O set r2,`/io #` \ Size of I/O region set r3,#0xc02 \ No caching or write buffering set r4,`io-va #` \ Virtual address bl `map-sections`
-\ The cache is not on yet -\ set r1,#0x4000 \ Size of section table -\ bl `clean-dcache-range` - mov pc, r10 end-code
Modified: cpu/arm/olpc/resetvec.bth ============================================================================== --- cpu/arm/olpc/resetvec.bth Wed Oct 12 00:29:49 2011 (r2592) +++ cpu/arm/olpc/resetvec.bth Wed Oct 12 02:30:09 2011 (r2593) @@ -152,7 +152,6 @@
\ Setup the page (section) table and turn on the MMU and caches \ set r0,`page-table-pa #` - set r0,`fw-mem-pa page-table-offset + #` bl `init-map` \ Setup the initial virtual address map bl `enable-mmu` \ Turn on the MMU bl `caches-on` \ Turn on the caches
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