[commit] r2577 - cpu/arm/marvell

[repository service]

Author: wmb
Date: Wed Oct  5 00:14:31 2011
New Revision: 2577
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2577

Log:
OLPC XO-1.75 - utmiphy.fth - factoring changes, no functional difference.

Modified:
   cpu/arm/marvell/utmiphy.fth

Modified: cpu/arm/marvell/utmiphy.fth
==============================================================================
--- cpu/arm/marvell/utmiphy.fth	Tue Oct  4 21:42:35 2011	(r2576)
+++ cpu/arm/marvell/utmiphy.fth	Wed Oct  5 00:14:31 2011	(r2577)
@@ -1,15 +1,14 @@
 \ See license at end of file
 purpose: Init UTMI USB Phy in Marvell SoC

-h# 207004 constant utmi-ctrl
-h# 207008 constant utmi-pll
-h# 20700c constant utmi-tx
-h# 207010 constant utmi-rx
-h# 207014 constant utmi-ivref
-h# 207018 constant utmi-t0
+: +utmi  ( offset -- offset' )  h# 20.7000 +  ;

-: regset  ( mask adr -- )  tuck io@  or               swap io!  ;
-: regclr  ( mask adr -- )  tuck io@  swap invert and  swap io!  ;
+h# 04 +utmi constant utmi-ctrl
+h# 08 +utmi constant utmi-pll
+h# 0c +utmi constant utmi-tx
+h# 10 +utmi constant utmi-rx
+h# 14 +utmi constant utmi-ivref
+h# 18 +utmi constant utmi-t0

: wait-cal  ( spins -- )
    0  do
@@ -36,39 +35,39 @@
 [then]

\ Turn on the USB PHY power
-   h# 1810.0000 utmi-ctrl regset  \ INPKT_DELAY_SOF, PU_REF
-   h#         2 utmi-ctrl regset  \ PLL_PWR_UP
+   h# 1810.0000 utmi-ctrl io-set  \ INPKT_DELAY_SOF, PU_REF
+   h#         2 utmi-ctrl io-set  \ PLL_PWR_UP
    d# 10 ms
-   h#         1 utmi-ctrl regset  \ PWR_UP
+   h#         1 utmi-ctrl io-set  \ PWR_UP
    1 ms

\ Linux code does this, perhaps redundantly
-   h# 1800.0000 utmi-ctrl regset  \ INPKT_DELAY_SOF, PU_REF
+   h# 1800.0000 utmi-ctrl io-set  \ INPKT_DELAY_SOF, PU_REF

-   h# 0000.8000 utmi-t0   regclr  \ REG_FIFO_SQ_RST
+   h# 0000.8000 utmi-t0   io-clr  \ REG_FIFO_SQ_RST

\ Configure the PLLs
-   pll-clr utmi-pll  regclr  \ PLLCALI12, PLLVDD18, PLLVDD12, KVCO, ICP, FBDIV, REFDIV, 
-   pll-set utmi-pll  regset  \         3         3         3     3    1     ee       b
+   pll-clr utmi-pll  io-clr  \ PLLCALI12, PLLVDD18, PLLVDD12, KVCO, ICP, FBDIV, REFDIV, 
+   pll-set utmi-pll  io-set  \         3         3         3     3    1     ee       b
    1 ms

-   tx-clr  utmi-tx   regclr  \ TXVDD12, CK60_PHSEL, IMPCAL_VTH
-   tx-set  utmi-tx   regset  \       3           4           0
+   tx-clr  utmi-tx   io-clr  \ TXVDD12, CK60_PHSEL, IMPCAL_VTH
+   tx-set  utmi-tx   io-set  \       3           4           0

-   rx-clr  utmi-rx   regclr  \ RX_SQ_THRESH
-   rx-set  utmi-rx   regset  \            7
+   rx-clr  utmi-rx   io-clr  \ RX_SQ_THRESH
+   rx-set  utmi-rx   io-set  \            7

d# 1000 wait-cal

d# 200 us
-   h# 0020.0000 utmi-pll  regset  \ VCOCAL_START
+   h# 0020.0000 utmi-pll  io-set  \ VCOCAL_START
    d# 40 us
-   h# 0020.0000 utmi-pll  regclr
+   h# 0020.0000 utmi-pll  io-clr

d# 200 us
-   h# 0000.1000 utmi-tx   regset  \ REG_RCAL_START
+   h# 0000.1000 utmi-tx   io-set  \ REG_RCAL_START
    d# 40 us
-   h# 0000.1000 utmi-tx  regclr
+   h# 0000.1000 utmi-tx  io-clr

d# 1000 wait-cal
 \   ." UTMI calibration done" cr