r878 - cpu/x86/pc/neptune

Author: wmb
Date: 2008-08-12 10:49:21 +0200 (Tue, 12 Aug 2008)
New Revision: 878

Modified:
   cpu/x86/pc/neptune/devices.fth
   cpu/x86/pc/neptune/romreset.bth
Log:
Neptune - fixed a merge problem that prevented startup (low RAM wasn't
mapped early enough) and fixed the base offset of the dropins device
so .dropins et al work.

Modified: cpu/x86/pc/neptune/devices.fth
===================================================================
--- cpu/x86/pc/neptune/devices.fth	2008-08-11 22:32:16 UTC (rev 877)
+++ cpu/x86/pc/neptune/devices.fth	2008-08-12 08:49:21 UTC (rev 878)
@@ -93,10 +93,10 @@

\ Create a node below the top-level FLASH node to accessing the portion
 \ containing the dropin modules
-0 0  " 10000"  " /flash" begin-package
+0 0  " 00000"  " /flash" begin-package
    " dropins" device-name

-   h# c0000 constant /device
+   h# 70000 constant /device
    fload ${BP}/dev/subrange.fth
 end-package

Modified: cpu/x86/pc/neptune/romreset.bth
===================================================================
--- cpu/x86/pc/neptune/romreset.bth	2008-08-11 22:32:16 UTC (rev 877)
+++ cpu/x86/pc/neptune/romreset.bth	2008-08-12 08:49:21 UTC (rev 878)
@@ -99,6 +99,7 @@

\ The LX devel board has only 512M ROM, but assigning 1M of address space is harmless
    25fff002.10f80000.      1808 set-msr  \ 1M ROM at fff0.0000, system RAM limit at 0f80.0000
+   20000000.000fff00.  10000020 set-msr  \ memory - 0..fffff
    2000000f.7ff00100.  10000028 set-msr  \ Top of memory at 0f7f.ffff
    212800fd.7fffd000.  10000029 set-msr  \ Range Offset - Frame buffer at PA fd00.0000 maps to RAM at 0f80.0000
 \ XXX do we need to make the OFW area cacheable via MSR 1817 ?