[commit] r2197 - in cpu/arm: mmp2 olpc/1.75

[repository service]

Author: wmb
Date: Tue May 10 19:56:01 2011
New Revision: 2197
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2197

Log:
OLPC XO-1.75 - new improved clock speed setting tools.

Added:
   cpu/arm/mmp2/clocks.fth
Modified:
   cpu/arm/olpc/1.75/fw.bth

Added: cpu/arm/mmp2/clocks.fth
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ cpu/arm/mmp2/clocks.fth	Tue May 10 19:56:01 2011	(r2197)
@@ -0,0 +1,35 @@
+purpose: Change the clock frequency
+
+: fccr@    ( -- n )  h# d405.0008 l@  ;
+: fccr!    ( n -- )  h# d405.0008 l!  ;
+: pj4-clksel  ( n -- )
+   d# 29 lshift                               ( field )
+   fccr@  h# e000.0000 invert and  or  fccr!  ( )
+;
+: sp-clksel  ( n -- )
+   d# 26 lshift                               ( field )
+   fccr@  h# 1c00.0000 invert and  or  fccr!  ( )
+;
+: pj4-cc!  ( n -- )  h# d428.2804 l!  ;
+
+: sp-cc!     ( n -- )  h# d428.2800 l!  ;
+\                                     cfraaADXBpP
+: sp-100mhz  ( -- )  0 sp-clksel   o# 37077703303 sp-cc!  ;  \ A 100, D 400, XP 100, B 100, P 100
+: sp-200mhz  ( -- )  0 sp-clksel   o# 37077301101 sp-cc!  ;  \ A 200, D 400, XP 200, B 200, P 200
+: sp-400mhz1 ( -- )  0 sp-clksel   o# 37077301100 sp-cc!  ;  \ A 200, D 400, XP 200, B 200, P 400
+: sp-400mhz2 ( -- )  0 sp-clksel   o# 37077300000 sp-cc!  ;  \ A 200, D 400, XP 400, B 400, P 400
+: sp-original        1 sp-clksel   o# 37077301101 sp-cc!  ;  \ A 200, D 400, XP 400, B 400, P 400
+
+\                                     cfr52ADXBCP
+: pj4-100mhz ( -- )  0 pj4-clksel  o# 37042703303 pj4-cc!  ;  \ A 100, D 400, XP 100, B 100, P 100
+: pj4-200mhz ( -- )  0 pj4-clksel  o# 37042301101 pj4-cc!  ;  \ A 200, D 400, XP 200, B 200, P 200
+: pj4-400mhz ( -- )  0 pj4-clksel  o# 37042301100 pj4-cc!  ;  \ A 200, D 400, XP 200, B 200, P 400
+: pj4-800mhz ( -- )  1 pj4-clksel  o# 37042201100 pj4-cc!  ;  \ A 266, D 400, XP 400, B 400, P 800
+
+0 [if]
+\ PJ4 versions using voting           cvr52ADXBCP
+: pj4-100mhz ( -- )  0 pj4-clksel  o# 21742703303 pj4-cc!  ;  \ A 100, D 400, XP 100, B 100, P 100
+: pj4-200mhz ( -- )  0 pj4-clksel  o# 21742301101 pj4-cc!  ;  \ A 200, D 400, XP 200, B 200, P 200
+: pj4-400mhz ( -- )  0 pj4-clksel  o# 21742301100 pj4-cc!  ;  \ A 200, D 400, XP 200, B 200, P 400
+: pj4-800mhz ( -- )  1 pj4-clksel  o# 21742201100 pj4-cc!  ;  \ A 266, D 400, XP 400, B 400, P 800
+[then]

Modified: cpu/arm/olpc/1.75/fw.bth
==============================================================================
--- cpu/arm/olpc/1.75/fw.bth	Tue May 10 19:53:29 2011	(r2196)
+++ cpu/arm/olpc/1.75/fw.bth	Tue May 10 19:56:01 2011	(r2197)
@@ -362,16 +362,7 @@
    game-key-mask =  if  protect-fw try-fs-update  then
 ;

-\ fload ${BP}/cpu/arm/mmp2/clocks.fth
-
-\ 0 [if]
-: 400mhz  ( -- )
-   h# d428.2804 l@  7 invert and  h# 7000.0000 or  1 or  h# d428.2804 l!
-;
-: 800mhz  ( -- )
-   h# d428.2804 l@  7 invert and  h# 7000.0000 or  h# d428.2804 l!
-;
-\ [then]
+fload ${BP}/cpu/arm/mmp2/clocks.fth

: startup  ( -- )
    standalone?  0=  if  exit  then