[commit] r2079 - cpu/x86/pc/olpc/via

[repository service]

Author: quozl
Date: Wed Dec 15 05:00:23 2010
New Revision: 2079
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2079

Log:
OLPC XO-1.5 - DSDT, enable THRM# GPIO (ebook) by default

This change means that the ebook switch is automatically functional,
without an ugly code block in the ebook switch driver which changes
low-level system registers.

This should be a safe change; any working ebook switch driver will
already have been making this config space tweak anyway.

Tested with Microsoft Windows XP by Luna.

Authored-by: Daniel Drake 
Tested-by: Luna Huang 
Acked-by: James Cameron

Modified:
   README
   cpu/x86/pc/olpc/via/dsdt.dsl

Modified: README
==============================================================================
--- README	Fri Dec 10 23:10:15 2010	(r2078)
+++ README	Wed Dec 15 05:00:23 2010	(r2079)
@@ -37,7 +37,7 @@
 few different CPUs and platforms.  The initial release contains
 the processor-independent core code, x86 CPU support, drivers
 for some common PC peripherals, and the current version of the
-port to the One Laptop Per Child computer.  The support code
+port to the One Laptop per Child computer.  The support code
 for other CPUs and devices, and documentation, will be released
 as time permits.

Modified: cpu/x86/pc/olpc/via/dsdt.dsl
==============================================================================
--- cpu/x86/pc/olpc/via/dsdt.dsl	Fri Dec 10 23:10:15 2010	(r2078)
+++ cpu/x86/pc/olpc/via/dsdt.dsl	Wed Dec 15 05:00:23 2010	(r2079)
@@ -343,6 +343,9 @@
     // always want to hear both lid events when awake
     Store (GPI7, LPOL)  // watch either edge

+    // always want to hear ebook events (through THRM# GPIO)
+    Store (One, _SB.PCI0.VT86.ENTH)
+
     Return (0)
 }

@@ -1173,6 +1176,10 @@
                     , 7,
                 IOBA, 9,        // Power Management I/O Base

+                Offset(0x8c), // Host Power Management Control
+                    , 3,
+                ENTH, 1,      // THRM# enable
+
                 Offset(0x94),
                     , 5,
                 PLLD, 1,    // RX9405 Internal PLL Reset During Suspend 0:Enable,1:Disable
@@ -2354,6 +2361,7 @@

Method(_INI, 0)
             {
+                Store (One, _SB.PCI0.VT86.ENTH)
                 Store (One, THRM)
                 Store (GPI9, TPOL)  // init edge detect from current state
             }