Author: wmb Date: Wed Jun 16 14:00:35 2010 New Revision: 1828 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1828
Log: SDHCI driver - factored out register mapping words to remove dependency on the PCI bus - for the benefit of the memory-mapped ARM SDHCI.
Added: dev/mmc/sdhci/pciregs.fth Modified: dev/mmc/sdhci/sdhci.bth dev/mmc/sdhci/sdhci.fth dev/mmc/sdhci/sdhci2.bth dev/mmc/sdhci/sdhcixo.bth
Added: dev/mmc/sdhci/pciregs.fth ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ dev/mmc/sdhci/pciregs.fth Wed Jun 16 14:00:35 2010 (r1828) @@ -0,0 +1,85 @@ +h# 100 value /regs \ Standard size of SDHCI register block +1 value #slots + +0 instance value slot +0 instance value chip + +: phys+ encode-phys encode+ ; +: i+ encode-int encode+ ; + +: make-reg ( -- ) + 0 0 encode-bytes + 0 0 h# 0000.0000 my-space + phys+ 0 i+ h# 0000.0100 i+ \ Config registers + + my-space " config-l@" $call-parent h# 410111ab = if \ Marvell CaFe chip + h# 4000 to /regs + then + + h# 40 my-space + " config-b@" $call-parent ( slot_info ) + 4 rshift 7 and 1+ dup to #slots ( #slots ) + 0 ?do + 0 0 h# 0100.0010 i 4 * + my-space + phys+ 0 i+ /regs i+ \ Operational regs for slot N + loop + " reg" property +; +make-reg + +: my-w@ ( offset -- w ) my-space + " config-w@" $call-parent ; +: my-w! ( w offset -- ) my-space + " config-w!" $call-parent ; + +: map-regs ( -- ) + chip if exit then + 0 0 h# 0200.0010 slot 1- 4 * + my-space + /regs " map-in" $call-parent + to chip + h# 16 4 my-w! \ Memory write and invalidate, bus mastering, memory +; +: unmap-regs ( -- ) + chip 0= if exit then +\ 0 4 my-w! + chip /regs " map-out" $call-parent + 0 to chip +; + +: marvell? ( -- flag ) 0 my-w@ h# 11ab = ; +: vendor-modes ( -- ) + marvell? if \ Marvel CaFe chip + \ One-time initialization of Marvell CaFe SD interface. + \ Marvell told us to do this once after reset. + \ The sw-reset command resets the registers, so you have + \ to do it after that, in addition to after power-up. + h# 0004 h# 6a chip + rw! \ Enable data CRC check + h# 7fff h# 60 chip + rw! \ Disable internal pull-up/down on DATA3 + then +; + +\ Some Marvell-specific stuff +: enable-sd-int ( -- ) + h# 300c chip + rl@ h# 8000.0002 or h# 300c chip + rl! +; +: disable-sd-int ( -- ) + h# 300c chip + rl@ 2 invert and h# 300c chip + rl! +; +: enable-sd-clk ( -- ) + h# 3004 chip + rw@ h# 2000 or h# 3004 chip + rw! +; +: disable-sd-clk ( -- ) + h# 3004 chip + rw@ h# 2000 invert and h# 3004 chip + rw! +; + +: ?cafe-fpga-quirk ( -- ) + marvell? if + \ OLPC-specific hack: fast clock doesn't work on the FPGA CaFe chip + " board-revision" evaluate h# b20 < if drop h# 103 then + then +; + +: ?via-quirk ( -- ) + \ This is a workaround for an odd problem with the Via Vx855 chip. + \ You have to tell it to use 1.8 V, otherwise when you tell it + \ it to use 3.3V, it will use 1.8 V instead! You only have to + \ do this 1.8V thing once after power-up to fix it until the + \ next power cycle. The "fix" survives resets; it takes a power + \ cycle to break it again. + + my-space " config-l@" $call-parent h# 95d01106 = if h# 0a h# 29 chip + rb! then +;
Modified: dev/mmc/sdhci/sdhci.bth ============================================================================== --- dev/mmc/sdhci/sdhci.bth Wed Jun 16 13:53:03 2010 (r1827) +++ dev/mmc/sdhci/sdhci.bth Wed Jun 16 14:00:35 2010 (r1828) @@ -8,6 +8,7 @@ begin-tokenizing sdhci.fc
FCode-version2 +fload ${BP}/dev/mmc/sdhci/pciregs.fth fload ${BP}/dev/mmc/sdhci/sdhci.fth
init
Modified: dev/mmc/sdhci/sdhci.fth ============================================================================== --- dev/mmc/sdhci/sdhci.fth Wed Jun 16 13:53:03 2010 (r1827) +++ dev/mmc/sdhci/sdhci.fth Wed Jun 16 14:00:35 2010 (r1828) @@ -17,55 +17,12 @@
" sdhci" " compatible" string-property
-h# 100 value /regs \ Standard size of SDHCI register block -1 value #slots - 0 instance value rca
-: phys+ encode-phys encode+ ; -: i+ encode-int encode+ ; - -: make-reg ( -- ) - 0 0 encode-bytes - 0 0 h# 0000.0000 my-space + phys+ 0 i+ h# 0000.0100 i+ \ Config registers - - my-space " config-l@" $call-parent h# 410111ab = if \ Marvell CaFe chip - h# 4000 to /regs - then - - h# 40 my-space + " config-b@" $call-parent ( slot_info ) - 4 rshift 7 and 1+ dup to #slots ( #slots ) - 0 ?do - 0 0 h# 0100.0010 i 4 * + my-space + phys+ 0 i+ /regs i+ \ Operational regs for slot N - loop - " reg" property -; -make-reg - - 0 value debug?
-0 instance value slot -0 instance value chip - h# 200 constant /block \ 512 bytes
-: my-w@ ( offset -- w ) my-space + " config-w@" $call-parent ; -: my-w! ( w offset -- ) my-space + " config-w!" $call-parent ; - -: map-regs ( -- ) - chip if exit then - 0 0 h# 0200.0010 slot 1- 4 * + my-space + /regs " map-in" $call-parent - to chip - h# 16 4 my-w! \ Memory write and invalidate, bus mastering, memory -; -: unmap-regs ( -- ) - chip 0= if exit then -\ 0 4 my-w! - chip /regs " map-out" $call-parent - 0 to chip -; - external : set-address ( rca slot -- ) to slot to rca map-regs ; : get-address ( -- rca ) rca ; @@ -93,32 +50,6 @@ : esr@ ( -- w ) h# 32 cw@ ; : esr! ( w -- ) h# 32 cw! ;
-: marvell? ( -- flag ) 0 my-w@ h# 11ab = ; -: vendor-modes ( -- ) - marvell? if \ Marvel CaFe chip - \ One-time initialization of Marvell CaFe SD interface. - \ Marvell told us to do this once after reset. - \ The sw-reset command resets the registers, so you have - \ to do it after that, in addition to after power-up. - h# 0004 h# 6a cw! \ Enable data CRC check - h# 7fff h# 60 cw! \ Disable internal pull-up/down on DATA3 - then -; - -\ Some Marvell-specific stuff -: enable-sd-int ( -- ) - h# 300c cl@ h# 8000.0002 or h# 300c cl! -; -: disable-sd-int ( -- ) - h# 300c cl@ 2 invert and h# 300c cl! -; -: enable-sd-clk ( -- ) - h# 3004 cw@ h# 2000 or h# 3004 cw! -; -: disable-sd-clk ( -- ) - h# 3004 cw@ h# 2000 invert and h# 3004 cw! -; - : clear-interrupts ( -- ) isr@ drop esr@ drop h# ffff isr! \ Clear all normal interrupts @@ -170,17 +101,6 @@ present-state@ h# 80000 and 0= ;
-: ?via-quirk ( -- ) - \ This is a workaround for an odd problem with the Via Vx855 chip. - \ You have to tell it to use 1.8 V, otherwise when you tell it - \ it to use 3.3V, it will use 1.8 V instead! You only have to - \ do this 1.8V thing once after power-up to fix it until the - \ next power cycle. The "fix" survives resets; it takes a power - \ cycle to break it again. - - my-space " config-l@" $call-parent h# 95d01106 = if h# 0a h# 29 cb! then -; - : card-power-on ( -- ) \ Card power on does not work if a removal interrupt is pending h# c0 isr! \ Clear any pending insert/remove events @@ -222,10 +142,7 @@ card-clock-off h# 003 \ division = 2^0, clocks on
- marvell? if - \ OLPC-specific hack: fast clock doesn't work on the FPGA CaFe chip - " board-revision" evaluate h# b20 < if drop h# 103 then - then + ?cafe-fpga-quirk
h# 2c cw! \ Set divisor to 2^0, leaving internal clock on card-clock-on
Modified: dev/mmc/sdhci/sdhci2.bth ============================================================================== --- dev/mmc/sdhci/sdhci2.bth Wed Jun 16 13:53:03 2010 (r1827) +++ dev/mmc/sdhci/sdhci2.bth Wed Jun 16 14:00:35 2010 (r1828) @@ -8,6 +8,7 @@ begin-tokenizing sdhci2.fc
FCode-version2 +fload ${BP}/dev/mmc/sdhci/pciregs.fth fload ${BP}/dev/mmc/sdhci/sdhci.fth
init
Modified: dev/mmc/sdhci/sdhcixo.bth ============================================================================== --- dev/mmc/sdhci/sdhcixo.bth Wed Jun 16 13:53:03 2010 (r1827) +++ dev/mmc/sdhci/sdhcixo.bth Wed Jun 16 14:00:35 2010 (r1828) @@ -8,6 +8,7 @@ begin-tokenizing sdhcixo.fc
FCode-version2 +fload ${BP}/dev/mmc/sdhci/pciregs.fth fload ${BP}/dev/mmc/sdhci/sdhci.fth
init
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