Author: wmb Date: Wed Aug 31 09:33:46 2011 New Revision: 2489 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2489
Log: ARM simulator - order of operands was wrong for SBC, leading to failures in m* when the result was negative and > 2^32.
Modified: cpu/arm/armsim.c
Modified: cpu/arm/armsim.c ============================================================================== --- cpu/arm/armsim.c Wed Aug 31 07:35:10 2011 (r2488) +++ cpu/arm/armsim.c Wed Aug 31 09:33:46 2011 (r2489) @@ -917,7 +917,7 @@ case 0x13: INSTR("rsb"); SBB(RD, IMM32, RN, 1); break; case 0x14: INSTR("add"); ADC(RD, RN, IMM32, 0); break; case 0x15: INSTR("adc"); ADC(RD, RN, IMM32, C); break; -case 0x16: INSTR("sbc"); SBB(RD, IMM32, RN, C); break; +case 0x16: INSTR("sbc"); SBB(RD, RN, IMM32, C); break; case 0x17: INSTR("rsc"); SBB(RD, IMM32, RN, C); break; case 0x18: INSTR("movw"); RD = IMM16; break; case 0x19: switch (BXTYPE) {