Author: wmb Date: Fri Dec 10 23:08:41 2010 New Revision: 2077 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2077
Log: ARM - support WFI and related instructions in the ARM assembler and disassembler.
Modified: cpu/arm/assem.fth cpu/arm/disassem.fth
Modified: cpu/arm/assem.fth ============================================================================== --- cpu/arm/assem.fth Thu Dec 9 06:30:02 2010 (r2076) +++ cpu/arm/assem.fth Fri Dec 10 23:08:41 2010 (r2077) @@ -990,6 +990,12 @@ : adr ( -- ) true (set) ; : set ( -- ) false (set) ;
+: nop32 ( -- ) h# 0320f000 {cond} !op ; +: yield ( -- ) h# 0320f001 {cond} !op ; +: wfe ( -- ) h# 0320f002 {cond} !op ; +: wfi ( -- ) h# 0320f003 {cond} !op ; +: sev ( -- ) h# 0320f004 {cond} !op ; + : nop ( -- ) h# e1a00000 asm, ; \ mov r0,r0
: # ( -- adt-immed ) adt-immed ;
Modified: cpu/arm/disassem.fth ============================================================================== --- cpu/arm/disassem.fth Thu Dec 9 06:30:02 2010 (r2076) +++ cpu/arm/disassem.fth Fri Dec 10 23:08:41 2010 (r2077) @@ -141,8 +141,25 @@ 4 0 do dup 1 and if over i + c@ emit then 2/ loop 2drop ; +: .event ( -- ) + 0 3 bits case + 0 of ." nop32" endof + 1 of ." yield" endof + 2 of ." wfe" endof + 3 of ." wfi" endof + 4 of ." sev" endof + 5 of ." nop5" endof + 6 of ." nop6" endof + 7 of ." nop7" endof + endcase + {<cond>} +; : .mrs/sr ( -- ) d#21 bit? if \ MSR + instruction @ h# 00cf.fff8 and h# 00000.f000 = if + .event + exit + then ." msr" {<cond>} op-col .psr .fields ., .r/imm else \ MRS