Author: wmb Date: Fri Aug 3 07:19:13 2012 New Revision: 3115 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3115
Log: OLPC ARM - New convenience functions for setting bit fields in I/O registers.
Modified: cpu/arm/mmp2/socregs.fth
Modified: cpu/arm/mmp2/socregs.fth ============================================================================== --- cpu/arm/mmp2/socregs.fth Wed Aug 1 10:49:33 2012 (r3114) +++ cpu/arm/mmp2/socregs.fth Fri Aug 3 07:19:13 2012 (r3115) @@ -14,6 +14,7 @@
: io-set ( mask offset -- ) dup io@ rot or swap io! ; : io-clr ( mask offset -- ) dup io@ rot invert and swap io! ; +: io-fld ( clr-mask set-mask offset -- ) >r r@ io@ rot invert and or r> io! ;
: icu@ ( offset -- value ) +icu io@ ; : icu! ( value offset -- ) +icu io! ; @@ -24,6 +25,10 @@ : pmua@ ( offset -- l ) +pmua io@ ; : pmua! ( l offset -- ) +pmua io! ;
+: pmua-set ( bits reg# -- ) +pmua io-set ; +: pmua-clr ( bits reg# -- ) +pmua io-clr ; +: pmua-fld ( clr set reg# -- ) +pmua io-fld ; + : apbc@ ( offset -- l ) +apbc io@ ; : apbc! ( l offset -- ) +apbc io! ;