Author: wmb Date: Sat Jul 16 14:08:23 2011 New Revision: 2378 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2378
Log: OLPC XO-1.5 - better value for turning off PCIe clock generator outputs.
Modified: cpu/x86/pc/olpc/via/startclkgen.fth
Modified: cpu/x86/pc/olpc/via/startclkgen.fth ============================================================================== --- cpu/x86/pc/olpc/via/startclkgen.fth Sat Jul 16 14:05:42 2011 (r2377) +++ cpu/x86/pc/olpc/via/startclkgen.fth Sat Jul 16 14:08:23 2011 (r2378) @@ -11,6 +11,6 @@ h# 05 smbus-io-base 3 + port-wb \ Register number inside clock generator (output config) h# 01 smbus-io-base 5 + port-wb \ Byte count smbus-io-base 2 + port-rb \ Read to reset the byte counter for the next write -h# 02 smbus-io-base 7 + port-wb \ Value to put in the clock generator output config reg - turns of PCIe clocks +h# 03 smbus-io-base 7 + port-wb \ Value to put in the clock generator output config reg - turns off PCIe clocks h# 54 smbus-io-base 2 + port-wb \ Fire off the command. 40 is the start bit, 14 is the "SMBus block data" command \ We don't wait for it to finish