[openfirmware] r1464 - cpu/x86/pc/olpc/via

Author: wmb
Date: 2009-11-09 08:40:32 +0000 (Mon, 09 Nov 2009)
New Revision: 1464

Modified:
   cpu/x86/pc/olpc/via/demodram.fth
   cpu/x86/pc/olpc/via/ioinit.fth
Log:
Via - A few more register tweaks based on recommendations from Via
(email from [e-mail] data 2009-11-08).

Modified: cpu/x86/pc/olpc/via/demodram.fth
===================================================================
--- cpu/x86/pc/olpc/via/demodram.fth	2009-11-09 08:10:10 UTC (rev 1463)
+++ cpu/x86/pc/olpc/via/demodram.fth	2009-11-09 08:40:32 UTC (rev 1464)
@@ -20,7 +20,7 @@
 [ifdef] xo-board
 \  0 3 devfunc  90 07 03 mreg  end-table  d# 20 wait-us  \ 200 MHz ATEST
 \  0 3 devfunc  90 e7 03 mreg  end-table  d# 20 wait-us  \ 200 MHz ATEST
-   0 3 devfunc  90 ff c3 mreg  end-table  d# 20 wait-us  \ 200 MHz ATEST
+   0 3 devfunc  90 ff 43 mreg  end-table  d# 20 wait-us  \ 200 MHz ATEST
 [then]
    0 3 devfunc  6b d0 c0 mreg  end-table  d# 20 wait-us  \ PLL Off
    0 3 devfunc  6b 00 10 mreg  end-table  d# 20 wait-us  \ PLL On

Modified: cpu/x86/pc/olpc/via/ioinit.fth
===================================================================
--- cpu/x86/pc/olpc/via/ioinit.fth	2009-11-09 08:10:10 UTC (rev 1463)
+++ cpu/x86/pc/olpc/via/ioinit.fth	2009-11-09 08:40:32 UTC (rev 1464)
@@ -108,10 +108,11 @@
    83 ff 81 mreg  \ P2PW down arb timer timer 8, P2PR down arb timer timer 1
    84 7f 28 mreg  \ Downstream arbitration Timeout timer for C2P
    85 c0 c0 mreg  \ Abort P2P cycle to PCI1, CPU to PCI1 cycle blocks next C2P cycle
-   a3 01 01 mreg  \ 01 res be like Phx
+   a3 01 00 mreg  \ Via suggests 0 here
    end-table

0 7 devfunc
+   76 ff d0 mreg  \ Via says this should be the same value as D17F7 Rx76
    e5 ff 40 mreg  \ Reserved - Phoenix value
    e6 ff 29 mreg  \ Reserved - Phoenix value
    end-table
@@ -335,7 +336,7 @@
    8d 18 18 mreg  \ fast clock as throttle timer tick, hold SMI# low until event status cleared (FIXME for OLPC)
 [then]
 [ifdef] xo-board
-   8d 18 10 mreg  \ fast clock as throttle timer tick, do not hold SMI# low
+   8d 18 18 mreg  \ fast clock as throttle timer tick, hold SMI# low until event status cleared
 [then]

94 ff 68 mreg  \ be like Phx