Author: wmb Date: Thu Sep 27 02:49:12 2012 New Revision: 3335 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3335
Log: OLPC ARM - Renamed l2$-efr to l2$-efr! (no existing users so rename is innocuous), added l2$-efr@ (the register is readable despite what the manual says).
Modified: cpu/arm/scc.fth
Modified: cpu/arm/scc.fth ============================================================================== --- cpu/arm/scc.fth Thu Sep 27 02:45:13 2012 (r3334) +++ cpu/arm/scc.fth Thu Sep 27 02:49:12 2012 (r3335) @@ -66,8 +66,11 @@ code clean&flush-l2$-way ( ws -- ) mcr p15,1,tos,cr7,cr15,2 pop tos,sp c; code clean&flush-l2$-pa ( pa -- ) mcr p15,1,tos,cr7,cr15,3 pop tos,sp c;
+\ L2 Cache Extra Features Register \ Bit 24 is L2 prefetch disable, bit 23 is L2 ECC enable -code l2$-efr ( n -- ) mcr p15,1,tos,cr15,cr1,0 pop tos,sp c; +\ Bit 8 (undocumented) enables write-coalescing +code l2$-efr! ( n -- ) mcr p15,1,tos,cr15,cr1,0 pop tos,sp c; +code l2$-efr@ ( -- n ) psh tos,sp mrc p15,1,tos,cr15,cr1,0 c;
code l2$-lockdown-way ( bits -- ) mcr p15,1,tos,cr15,cr10,7 pop tos,sp c;