Author: wmb
Date: Fri Nov 16 09:27:02 2012
New Revision: 3438
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3438
Log:
## Lines starting with '## ' will be removed from the log message.
## File(s) to commit:
## cpu/arm/olpc/sound.fth
## cpu/x86/pc/olpc/plot.fth
## dev/geode/ac97/selftest.fth
## dev/hdaudio/noiseburst.fth
## dev/hdaudio/test.fth
OLPC ARM accelerometer test - more tweaks to the test limits as suggested by the vendor.
Modified:
cpu/arm/olpc/accelerometer.fth
Modified: cpu/arm/olpc/accelerometer.fth
==============================================================================
--- cpu/arm/olpc/accelerometer.fth Fri Nov 16 02:17:56 2012 (r3437)
+++ cpu/arm/olpc/accelerometer.fth Fri Nov 16 09:27:02 2012 (r3438)
@@ -75,9 +75,9 @@
\ X:80..1700 Y:80..1700 Z:80..1400.
\ The numbers are in units of "1LSB = 1mg", 1000 unit = 1 gravity.
-d# 80 value min-x
-d# 20 value min-y
-d# 80 value min-z
+d# 60 value min-x
+d# 60 value min-y
+d# 40 value min-z
d# 1700 value max-x
d# 1700 value max-y
d# 1400 value max-z
@@ -179,7 +179,7 @@
\ The attempt to talk at the old address failed, so we assume the new chip
\ Support for new LIS3DHTR chip
d# 400,000 to bus-speed
- d# 80 to min-x d# 20 to min-y d# 80 to min-z
+ d# 60 to min-x d# 60 to min-y d# 40 to min-z
d# 1700 to max-x d# 1700 to max-y d# 1400 to max-z
h# 19 1 reg
['] lis3dhtr-selftest to lis-selftest
Author: wmb
Date: Thu Nov 15 23:24:46 2012
New Revision: 3435
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3435
Log:
OLPC ARM - Fixed a build problem by changing the way that the recently introduced clock-divider-regval property is calculated.
Modified:
cpu/arm/olpc/1.75/lcdcfg.fth
cpu/arm/olpc/lcd.fth
Modified: cpu/arm/olpc/1.75/lcdcfg.fth
==============================================================================
--- cpu/arm/olpc/1.75/lcdcfg.fth Thu Nov 15 23:22:25 2012 (r3434)
+++ cpu/arm/olpc/1.75/lcdcfg.fth Thu Nov 15 23:24:46 2012 (r3435)
@@ -32,7 +32,11 @@
h# 2000000d " lcd-dumb-ctrl-regval" integer-property
h# 08001100 " lcd-pn-ctrl0-regval" integer-property
- clkdiv " clock-divider-regval" integer-property \ Depends on MMP2 vs MMP3
+
+\ In MMP3, the SCLK_SOURCE_SELECT field moved from bit 30 to bit 29,
+\ so the high nibble changed from 4 (MMP2) to 2 (MMP3) for the same
+\ field value 1.
+[ifdef] mmp3 h# 20001102 [else] h# 40001102 [then] " clock-divider-regval" integer-property
finish-device
device-end
Modified: cpu/arm/olpc/lcd.fth
==============================================================================
--- cpu/arm/olpc/lcd.fth Thu Nov 15 23:22:25 2012 (r3434)
+++ cpu/arm/olpc/lcd.fth Thu Nov 15 23:24:46 2012 (r3435)
@@ -11,15 +11,11 @@
" /pmua" encode-phandle 1 encode-int encode+ " clocks" property
d# 41 " interrupts" integer-property
-[ifdef] olpc-cl4
-\ This value has the same effect as the value below. The
-\ difference is that the SCLK_SOURCE_SELECT field added a
-\ low-order bit (bit 29), so the high nibble changed from
-\ 2 to 4 even though the field value is still 1.
-h# 20001102 value clkdiv \ Display Clock 1 / 2 -> 56.93 MHz
-[else]
-h# 40001102 value clkdiv \ Display Clock 1 / 2 -> 56.93 MHz
-[then]
+\ In MMP3, the SCLK_SOURCE_SELECT field moved from bit 30 to bit 29,
+\ so the high nibble changed from 4 (MMP2) to 2 (MMP3) for the same
+\ field value 1.
+[ifdef] mmp3 h# 20001102 [else] h# 40001102 [then] value clkdiv \ Display Clock 1 / 2 -> 56.93 MHz
+
h# 00000700 value pmua-disp-clk-sel \ PLL1 / 7 -> 113.86 MHz
d# 8 value hsync \ Sync width