openfirmware July 2011

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[commit] r2356 - in cpu: arm/olpc/1.75 x86/pc/olpc/via
by repository service 14 Jul '11

14 Jul '11

Author: wmb Date: Thu Jul 14 05:41:20 2011 New Revision: 2356 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2356 Log: Use latest NANDblaster source for 1.5 and 1.75 to pick up the move of memcmp() to the library. Modified: cpu/arm/olpc/1.75/mcnand-version.fth cpu/x86/pc/olpc/via/mcnand-version.fth Modified: cpu/arm/olpc/1.75/mcnand-version.fth ============================================================================== --- cpu/arm/olpc/1.75/mcnand-version.fth Thu Jul 14 04:36:29 2011 (r2355) +++ cpu/arm/olpc/1.75/mcnand-version.fth Thu Jul 14 05:41:20 2011 (r2356) @@ -3,6 +3,7 @@ \ With a specific ID, mcastnand.bth will download a tarball without .git stuff. \ With "test", mcastnand.bth will clone the git head if build/multicast-nand/ \ is not already present, then you can modify the git subtree as needed. -macro: MCNAND_VERSION c535151a3f7f396006eb0d5ebd25d135351ffc06 +macro: MCNAND_VERSION 059bd03137c19d67a28c67665c4ce50fd5d35565 + \ macro: MCNAND_VERSION test \ macro: MCNAND_VERSION HEAD Modified: cpu/x86/pc/olpc/via/mcnand-version.fth ============================================================================== --- cpu/x86/pc/olpc/via/mcnand-version.fth Thu Jul 14 04:36:29 2011 (r2355) +++ cpu/x86/pc/olpc/via/mcnand-version.fth Thu Jul 14 05:41:20 2011 (r2356) @@ -3,6 +3,6 @@ \ With a specific ID, mcastnand.bth will download a tarball without .git stuff. \ With "test", mcastnand.bth will clone the git head if build/multicast-nand/ \ is not already present, then you can modify the git subtree as needed. -macro: MCNAND_VERSION 506d22f97f71632efa353dc347646d24570024b1 +macro: MCNAND_VERSION 059bd03137c19d67a28c67665c4ce50fd5d35565 \ macro: MCNAND_VERSION test \ macro: MCNAND_VERSION HEAD

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[commit] r2355 - cpu/arm/olpc/1.75
by repository service 14 Jul '11

14 Jul '11

Author: quozl Date: Thu Jul 14 04:36:29 2011 New Revision: 2355 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2355 Log: OLPC XO-1.75 bringup, uec Modified: cpu/arm/olpc/1.75/fw.bth Modified: cpu/arm/olpc/1.75/fw.bth ============================================================================== --- cpu/arm/olpc/1.75/fw.bth Thu Jul 14 04:07:23 2011 (r2354) +++ cpu/arm/olpc/1.75/fw.bth Thu Jul 14 04:36:29 2011 (r2355) @@ -507,6 +507,7 @@ " flash-ec http:\\10.20.0.14\ecimage.bin" eval ; : urom " flash! u:\new.rom" eval ; +: uec " flash-ec! u:\ecimage.bin" eval ; : erom " flash! ext:\new.rom" eval ; : no-usb-delay " dev /usb false to delay? dend" evaluate ; : null-fsdisk

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[commit] r2354 - clients/lib
by repository service 14 Jul '11

14 Jul '11

Author: quozl Date: Thu Jul 14 04:07:23 2011 New Revision: 2354 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2354 Log: memcmp, fix to previous commit, size_t not present, use int Modified: clients/lib/mem.c Modified: clients/lib/mem.c ============================================================================== --- clients/lib/mem.c Thu Jul 14 04:05:00 2011 (r2353) +++ clients/lib/mem.c Thu Jul 14 04:07:23 2011 (r2354) @@ -17,7 +17,7 @@ } int -memcmp(const void *s1, const void *s2, size_t n) +memcmp(const void *s1, const void *s2, int n) { int diff; while (n--) {

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[commit] r2353 - clients/lib
by repository service 14 Jul '11

14 Jul '11

Author: quozl Date: Thu Jul 14 04:05:00 2011 New Revision: 2353 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2353 Log: memcmp version from multicast-nand moved into library, Mitch identified it as better than the one that was there. Modified: clients/lib/mem.c Modified: clients/lib/mem.c ============================================================================== --- clients/lib/mem.c Thu Jul 14 01:28:41 2011 (r2352) +++ clients/lib/mem.c Thu Jul 14 04:05:00 2011 (r2353) @@ -17,10 +17,13 @@ } int -memcmp(void *s1, void *s2, int len) +memcmp(const void *s1, const void *s2, size_t n) { - for (; len--; ++s1, ++s2) - if (*(unsigned char *)s1 != *(unsigned char *)s2) - return *(unsigned char *)s1 - *(unsigned char *)s2; + int diff; + while (n--) { + diff = *(unsigned char *)s1++ - *(unsigned char *)s2++; + if (diff) + return (diff < 0) ? -1 : 1; + } return 0; }

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[commit] r2352 - cpu/arm/olpc/1.75
by repository service 13 Jul '11

13 Jul '11

Author: wmb Date: Thu Jul 14 01:28:41 2011 New Revision: 2352 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2352 Log: OLPC XO-1.75 - fixed DRAM timings to match Marvell's latest recommendations. This is in the version of the file that splits out the parameters into individual fields, not the digested version that is used in CForth for the actual parameter setting. Modified: cpu/arm/olpc/1.75/xo-dram.fth Modified: cpu/arm/olpc/1.75/xo-dram.fth ============================================================================== --- cpu/arm/olpc/1.75/xo-dram.fth Thu Jul 14 01:12:07 2011 (r2351) +++ cpu/arm/olpc/1.75/xo-dram.fth Thu Jul 14 01:28:41 2011 (r2352) @@ -77,16 +77,16 @@ mmap0 h# 0000.0000 d# 23 rshift start-addr -h# 4000.0000 log2 d# 16 - area-length +h# 2000.0000 log2 d# 16 - area-length h# 0000.0000 d# 23 rshift addr-mask 1 cs-valid outbits mmap1 -h# 4000.0000 d# 23 rshift start-addr -h# 4000.0000 log2 d# 16 - area-length +h# 2000.0000 d# 23 rshift start-addr +h# 2000.0000 log2 d# 16 - area-length h# 0000.0000 d# 23 rshift addr-mask -0 cs-valid +1 cs-valid outbits sdram-config-type1-cs0 @@ -166,16 +166,16 @@ outbits sdram-timing4 -d# 5.625 ns>clk d# 4 max tcke +d# 5.625 ns>clk ( d# 4 max ) tcke d# 200000.000 ns>clk d# 1024 /roundup init-count - 1 trwd-ext-dly + 2 trwd-ext-dly d# 100.000 ns>clk reset-count -d# 390 init-count-nop +d# 391 init-count-nop outbits sdram-timing5 d# 37.500 ns>clk 0 max tras -d# 37.500 ns>clk 0 max tfaw +d# 37.500 ns>clk d# 20 max tfaw d# 1 tccd-ccs-ext-dly outbits @@ -186,9 +186,9 @@ outbits sdram-ctrl1 -1 aps-en -1 aps-type -4 aps-value +0 aps-en \ 1 aps-en +0 aps-type \ 1 aps-type +0 aps-value \ 4 aps-value d# 12.500 ns>clk acs-exit-dly 0 acs-en 0 dll-reset @@ -198,14 +198,14 @@ outbits sdram-ctrl2 -0 ref-posted-en -0 ref-posted-max -d# 16 sdram-line-boundary +1 ref-posted-en +7 ref-posted-max +d# 8 sdram-line-boundary 0 refpb-mode 0 pd-mode 0 2t-mode 0 rdimm-mode -1 aprecharge +0 aprecharge 0 int-shadow-mode 0 test-mode outbits @@ -235,9 +235,9 @@ 0 al-number \ unsupported 0 al-en 0 rq-ds-en -3 cas-latency \ For DDR3, upper 3 bits of CL - so 3 for CL6 and CL7 +2 cas-latency \ For DDR3, upper 3 bits of CL - so 3 for CL6 and CL7 0 cas-latency-lower \ For DDR3, lower bit of CL - so 0 for CL6, 1 for CL7 -1 cwl \ 0 for WL5, 1 for WL6, 2 for WL7, 3 for WL8 +0 cwl \ 0 for WL5, 1 for WL6, 2 for WL7, 3 for WL8 0 s4-type \ LPDDR2 only 0 asr \ DDR3 only 0 srt \ DDR3 only @@ -267,7 +267,7 @@ outbits sdram-ctrl8-odt-ctrl2 -1 xpage-en +0 xpage-en 3 mc-queue-size-f 3 mc-queue-size outbits @@ -354,37 +354,11 @@ 0 write-protection outbits -phy-ctrl11 -0 mc-sync-type -outbits - -\ This is the base value -phy-ctrl14 -1 phy-sync-en -0 dll-update-en -0 phy-dll-rst -0 phy-pll-rst -0 dll-update-en-static -outbits - -\ Assert DLL reset -phy-ctrl14 -1 phy-sync-en -0 dll-update-en -1 phy-dll-rst -0 phy-pll-rst -0 dll-update-en-static -outbits - -\ Release DLL reset -phy-ctrl14 -1 phy-sync-en -0 dll-update-en -0 phy-dll-rst -0 phy-pll-rst -0 dll-update-en-static -outbits +\ phy-ctrl11 +\ 0 mc-sync-type +\ outbits +0 [if] \ First value, with auto-cal enabled phy-ctrl10 1 pad-cal-interval @@ -418,6 +392,7 @@ 0 mc-ck-pd 0 mc-ac-d outbits +[then] phy-ctrl3 h# 2000 phy-res \ Reserved, but Marvell spreadsheet sets it @@ -426,30 +401,30 @@ 0 dq-oen-extend 0 dq-oen-dly 0 rd-ext-dly -4 phy-rfifo-rptr-dly-val \ Tune me !!! -4 dq-ext-dly \ Tune me !!! +3 phy-rfifo-rptr-dly-val \ Tune me !!! +3 dq-ext-dly \ Tune me !!! outbits phy-ctrl7 1 phy-qs-vref-sel -b# 1111 phy-dq-zpdrv -b# 1111 phy-dq-zndrv +b# 0111 phy-dq-zpdrv +b# 0111 phy-dq-zndrv b# 1000 phy-dq-zptrm b# 0100 phy-dq-zntrm -b# 1000 phy-dq-znr -b# 0100 phy-dq-zpr +b# 0111 phy-dq-znr +b# 1001 phy-dq-zpr b# 10 phy-dq-vref-sel 0 phy-dq-zd 1 phy-dq-mode outbits phy-ctrl8 -b# 1111 phy-adcm-zpdrv -b# 1111 phy-adcm-zndrv +b# 0111 phy-adcm-zpdrv +b# 0111 phy-adcm-zndrv b# 0000 phy-adcm-zptrm b# 0000 phy-adcm-zntrm -b# 1000 phy-adcm-znr -b# 0100 phy-adcm-zpr +b# 0111 phy-adcm-znr +b# 1001 phy-adcm-zpr 0 phy-adcm-zd outbits @@ -463,45 +438,63 @@ 0 phy-wc-qs-dly 0 phy-wck-ac-dly 0 phy-wck-ck-dly -b# 1000 phy-ck-znr -b# 0100 phy-ck-zpr +b# 0111 phy-ck-znr +b# 0111 phy-ck-zpr outbits phy-ctrl13 -2 dll-resrt-timer +d# 13 dll-resrt-timer 0 dll-update-stall-mc-dis -d# 16 dll-delay-test -d# 08 dll-phsel -1 dll-auto-manual-up +0 dll-delay-test +d# 04 dll-phsel +0 dll-auto-manual-up 0 dll-auto-update-en 0 dll-test-en 0 dll-bypass-en outbits phy-dll-ctrl1 -d# 16 dll-delay-test -d# 8 dll-phsel +0 dll-delay-test +d# 4 dll-phsel 0 dll-auto-update-en 0 dll-test-en 0 dll-bypass-en outbits phy-dll-ctrl2 -d# 16 dll-delay-test -d# 8 dll-phsel +0 dll-delay-test +d# 4 dll-phsel 0 dll-auto-update-en 0 dll-test-en 0 dll-bypass-en outbits phy-dll-ctrl3 -d# 16 dll-delay-test -d# 8 dll-phsel +0 dll-delay-test +d# 4 dll-phsel 0 dll-auto-update-en 0 dll-test-en 0 dll-bypass-en outbits +\ Assert DLL reset +phy-ctrl14 +0 phy-sync-en +0 dll-update-en +1 phy-dll-rst +0 phy-pll-rst +0 dll-update-en-static +outbits + +\ Release DLL reset and enable update +phy-ctrl14 +0 phy-sync-en +1 dll-update-en +0 phy-dll-rst +0 phy-pll-rst +0 dll-update-en-static +outbits + phy-ctrl-wl-select 0 phy-wl-dqs-recen-dqs 0 phy-wl-cs-sel

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[commit] r2351 - cpu/arm/olpc/1.75
by repository service 13 Jul '11

13 Jul '11

Author: wmb Date: Thu Jul 14 01:12:07 2011 New Revision: 2351 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2351 Log: Fixed a formatting typo. No semantic change. Modified: cpu/arm/olpc/1.75/lcd.fth Modified: cpu/arm/olpc/1.75/lcd.fth ============================================================================== --- cpu/arm/olpc/1.75/lcd.fth Thu Jul 14 01:11:19 2011 (r2350) +++ cpu/arm/olpc/1.75/lcd.fth Thu Jul 14 01:12:07 2011 (r2351) @@ -27,7 +27,7 @@ h# 01330133 h# 13c lcd! \ Panel VSYNC Pulse Pixel Edge Control clkdiv h# 1a8 lcd! \ Clock divider \ h# 08021100 h# 190 lcd! \ DMA CTRL 0 - enable DMA, 24 bpp mode - h# 08001100 h# 190 lcd! \ DMA CTRL 0 - enable DMA, 16 bpp mode + h# 08001100 h# 190 lcd! \ DMA CTRL 0 - enable DMA, 16 bpp mode ; : normal-hsv ( -- )

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[commit] r2350 - cpu/arm/olpc/1.75
by repository service 13 Jul '11

13 Jul '11

Author: wmb Date: Thu Jul 14 01:11:19 2011 New Revision: 2350 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2350 Log: OLPC XO-1.75 - new EC version 4.0.2.00 Modified: cpu/arm/olpc/1.75/ec-version.fth Modified: cpu/arm/olpc/1.75/ec-version.fth ============================================================================== --- cpu/arm/olpc/1.75/ec-version.fth Thu Jul 14 01:08:39 2011 (r2349) +++ cpu/arm/olpc/1.75/ec-version.fth Thu Jul 14 01:11:19 2011 (r2350) @@ -1,5 +1,5 @@ \ The EC microcode -macro: EC_VERSION 4_0_1_03 +macro: EC_VERSION 4_0_2_00 \ Alternate command for getting EC microcode, for testing new versions. \ Temporarily uncomment the line and modify the path as necessary

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[commit] r2349 - cpu/arm/olpc/1.75/build
by repository service 13 Jul '11

13 Jul '11

Author: wmb Date: Thu Jul 14 01:08:39 2011 New Revision: 2349 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2349 Log: svn ignore Modified: cpu/arm/olpc/1.75/build/ (props changed)

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[commit] r2348 - cpu/arm/mmp2
by repository service 13 Jul '11

13 Jul '11

Author: wmb Date: Thu Jul 14 01:07:54 2011 New Revision: 2348 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2348 Log: Checked in some experimental code for testing the speed of MMP2 memory to memory DMA; it serves as an example for how to drive said hardware. Added: cpu/arm/mmp2/mdma.fth Added: cpu/arm/mmp2/mdma.fth ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ cpu/arm/mmp2/mdma.fth Thu Jul 14 01:07:54 2011 (r2348) @@ -0,0 +1,71 @@ +purpose: Test code to determine the speed of MMP2 memory to memory DMA + +\ Copy from cache to cache - 1.3 GB/sec +\ Copy from memory to memory - 323 MB/sec +\ DMA from memory to memory - 425 MB/sec +\ Read from cache (address constant) 4.2 GB/sec +\ Read from memory (advancing address) 390 MB/sec + +h# d42a.0a00 value mdma0-base + +: mdma! ( n offset -- ) mdma0-base + l! ; +: mdma@ ( offset -- n ) mdma0-base + l@ ; + +h# 0010.0000 constant mdma-ram +h# ffc0 constant /mdma-buf +mdma-ram constant mdma-desc0 +h# 10 constant /dma-desc + +\ Descriptor format: +\ Byte count +\ Source +\ Destination +\ link + +: set-descriptor ( next dest source length adr -- ) + >r r@ l! r@ la1+ l! r@ 2 la+ l! r> 3 la+ l! +; + +code cmake-test-ring ( src-adr dst-adr len desc -- ) + \ tos: desc + pop r4,sp \ r4: Total length + pop r2,sp \ r2: dst + pop r1,sp \ r1: src + set r0,#0xffc0 + begin + add r3,tos,#0x10 + stmia tos!,{r0,r1,r2,r3} + inc r1,r0 + inc r2,r0 + decs r4,r0 + 0<= until + \ Go back to last descriptor + dec tos,#0x10 + mov r3,#0 + str r3,[tos,#0x0c] \ Last link is 0 + inc r4,r0 + str r4,[tos] \ Fixup last length + pop tos,sp +c; +0 value dst-adr +0 value src-adr +0 value desc-adr +: make-test-ring ( src-adr dst-adr len -- ) + swap to dst-adr swap to src-adr + mdma-desc0 to desc-adr + 0 ?do + desc-adr /dma-desc + dst-adr i + src-adr i + /mdma-buf desc-adr set-descriptor + desc-adr /dma-desc + to desc-adr + /mdma-buf +loop + + desc-adr /dma-desc - to desc-adr + 0 desc-adr 3 la+ l! \ Put null in last link + + mdma-desc0 h# 30 mdma! \ Link to first descriptor +; +: start-test-ring ( -- ) +\ 8 h# d428.2864 l! \ Enable DMA clock + 1 h# 80 mdma! \ Enable DMA completion interrupts + h# 0000.3d80 h# 40 mdma! \ fetch next, enable, chain, 32 bytes, inc dest, inc src +; +: abort-test-ring ( -- ) h# 10.0000 h# 40 mdma! ;

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[commit] r2347 - cpu/arm/mmp2
by repository service 12 Jul '11

12 Jul '11

Author: wmb Date: Tue Jul 12 11:26:19 2011 New Revision: 2347 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2347 Log: Checked in some demonstration/test code for the Marvel MMP2 internal RTC. Added: cpu/arm/mmp2/rtc.fth Added: cpu/arm/mmp2/rtc.fth ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ cpu/arm/mmp2/rtc.fth Tue Jul 12 11:26:19 2011 (r2347) @@ -0,0 +1,26 @@ +purpose: Driver for MMP2 internal RTC + +\ This code was written as a test/demonstration of using +\ the MMP2 internal RTC to generate alarm interrupts. +\ It is not currently used by anything, and should it +\ ever be needed, it should be put in a device node. + +: int5-mask! ( value -- ) h# d428.216c l! ; +: int5-mask@ ( -- value ) h# d428.216c l@ ; +: int5-status@ ( -- value ) h# d428.2154 l@ ; +: enable-rtc ( -- ) h# 81 h# d401.5000 l! ; +: soc-rtc@ ( offset -- value ) h# d401.0000 + l@ ; +: soc-rtc! ( value offset -- value ) h# d401.0000 + l! ; +: take-alarm ( -- ) + ." Alarm fired" cr + 0 8 soc-rtc! + int5-mask@ 1 or int5-mask! \ Mask alarm +; +: alarm-in-5 ( -- ) + enable-rtc \ Turn on clocks + int5-mask@ 1 invert and int5-mask! \ Unmask alarm + 0 soc-rtc@ d# 5 + 4 soc-rtc! \ Set alarm for 5 seconds from now + 7 8 soc-rtc! \ Ack old interrupts and enable new ones + ['] take-alarm 5 interrupt-handler! + 5 enable-interrupt +;

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