Author: wmb
Date: Thu Jul 1 19:34:33 2010
New Revision: 1854
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1854
Log:
OLPC XO-1.5 - perform additional PCI config register restoration
by including startpcirestore.fth at the appropriate place in the
resume-from-S3 sequence.
Modified:
cpu/x86/pc/olpc/via/romreset.bth
Modified: cpu/x86/pc/olpc/via/romreset.bth
==============================================================================
--- cpu/x86/pc/olpc/via/romreset.bth Thu Jul 1 19:32:54 2010 (r1853)
+++ cpu/x86/pc/olpc/via/romreset.bth Thu Jul 1 19:34:33 2010 (r1854)
@@ -248,6 +248,10 @@
ax jmp \ Jump in 32-bit protected mode
then
+ \ This only works if prep-rm has already been executed;
+ \ otherwise it will hang trying to re-enable SMM
+ fload ${BP}/cpu/x86/pc/olpc/via/startpcirestore.fth \ SD host controller PCI BARs
+
facs-adr h# c + #) ax mov ax ax or 0<> if
\ Resume in real mode for ACPI operating systems
\ Linear wakeup address is in EAX
Author: wmb
Date: Thu Jul 1 19:32:54 2010
New Revision: 1853
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1853
Log:
OLPC XO-1.5 - added commented-out code to early startup sequence
to clear memory before starting Forth. It was a test for a
page-fault-after-runin problem that was never fully diagnosed -
but it seems to have disappeared with a new system build.
(This message applies to the change to startmemtop.fth; the
previous instance of this message was incorrectly attached
to the initial checkin of startpcirestore.fth)
Modified:
cpu/x86/pc/olpc/via/startmemtop.fth
Modified: cpu/x86/pc/olpc/via/startmemtop.fth
==============================================================================
--- cpu/x86/pc/olpc/via/startmemtop.fth Thu Jul 1 19:31:17 2010 (r1852)
+++ cpu/x86/pc/olpc/via/startmemtop.fth Thu Jul 1 19:32:54 2010 (r1853)
@@ -19,3 +19,9 @@
bx mem-info-pa 4 + #) mov \ Top of memory
+\ bx di mov
+\ h# 800.0000 # di sub \ Clear the last 128 MB
+\ h# 800.0000 4 / # cx mov \ Longword count
+\ cld
+\ ax ax xor
+\ rep ax stos
Author: wmb
Date: Thu Jul 1 19:31:17 2010
New Revision: 1852
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1852
Log:
The last revision message was in error. It should have read:
OLPC XO-1.5 - restore some additional PCI configuration register settings when resuming Windows, particularly in the SD host controller"
Modified:
cpu/x86/pc/olpc/via/startpcirestore.fth
Modified: cpu/x86/pc/olpc/via/startpcirestore.fth
==============================================================================
--- cpu/x86/pc/olpc/via/startpcirestore.fth Thu Jul 1 19:25:39 2010 (r1851)
+++ cpu/x86/pc/olpc/via/startpcirestore.fth Thu Jul 1 19:31:17 2010 (r1852)
@@ -52,5 +52,4 @@
\ 64 88e5 config-wb \ 04 bit enables PCS1
\ acpi-io-base h# 2b + # dx mov dx al in h# 80 # al or al dx out \ Enable SMI on GPIO Range 1 access
-
\ acpi-io-base h# 4 + # dx mov dx al in h# 01 # al or al dx out \ Enable SCI
Author: wmb
Date: Thu Jul 1 19:25:39 2010
New Revision: 1851
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1851
Log:
OLPC XO-1.5 - added commented-out code to early startup sequence
to clear memory before starting Forth. It was a test for a
page-fault-after-runin problem that was never fully diagnosed -
but it seems to have disappeared with a new system build.
Added:
cpu/x86/pc/olpc/via/startpcirestore.fth
Added: cpu/x86/pc/olpc/via/startpcirestore.fth
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ cpu/x86/pc/olpc/via/startpcirestore.fth Thu Jul 1 19:25:39 2010 (r1851)
@@ -0,0 +1,56 @@
+\ Restore PCI config registers
+
+8000.0000 6010 config-wl \ BAR 0
+8000.1000 6014 config-wl \ BAR 1
+8000.2000 6018 config-wl \ BAR 2
+ 0016 6004 config-ww \ Enables
+ 0a 603c config-wb \ Interrupt line
+
+ \ This is a workaround for an odd problem with the Via Vx855 chip.
+ \ You have to tell it to use 1.8 V, otherwise when you tell it
+ \ it to use 3.3V, it will use 1.8 V instead! You only have to
+ \ do this 1.8V thing once after power-up to fix it until the
+ \ next power cycle. The "fix" survives resets; it takes a power
+ \ cycle to break it again.
+
+\ First 1.8V
+0a # al mov al 8000.0029 #) mov
+ al 8000.1029 #) mov
+ al 8000.2029 #) mov
+
+\ Then 3.3V
+0e # al mov al 8000.0029 #) mov
+ al 8000.1029 #) mov
+ al 8000.2029 #) mov
+
+\ Then power on
+0f # al mov al 8000.0029 #) mov
+ al 8000.1029 #) mov
+ al 8000.2029 #) mov
+
+\ 0e # al mov al 8000.0029 #) mov
+\ al 8000.1029 #) mov
+\ al 8000.2029 #) mov
+
+ f9 6099 config-wb \ Two SD slots (correct for XP, wrong for Linux)
+
+\ \ Enable System Management Mode, assuming that the in-memory data structures are already set up
+\ 21 383 config-wb \ Enable A/Bxxxx range as memory instead of frame buffer (with fxxxx region R/O)
+\ 3b 386 config-wb \ 01 bit enables compatible SMM
+\ 3b 8fe6 config-wb \ 02 bit enables high SMM
+
+\ acpi-io-base h# 2c + # dx mov dx al in h# 01 # al or al dx out \ Global SMI enable
+\ acpi-io-base h# 2a + # dx mov dx al in h# 40 # al or al dx out \ Enable SMI on access to software SMI register
+\ 0 acpi-io-base h# 2a + port-wb \ Trigger SMI; the "relocate the SMI base" handler is already installed
+
+\ 20 383 config-wb \ Restore A/Bxxxx range to its normal frame buffer usage
+
+\ \ Enable Real Mode gateway using System Management Mode
+\ 0030 885e config-ww \ PCS3 I/O Port address (port 30)
+\ f7 8864 config-wb \ f* sets PCS3 decode length to 16 bytes (ports 30-3f)
+\ 03 8866 config-wb \ 02 bit enables PCS3 decoding
+\ 64 88e5 config-wb \ 04 bit enables PCS1
+
+\ acpi-io-base h# 2b + # dx mov dx al in h# 80 # al or al dx out \ Enable SMI on GPIO Range 1 access
+
+\ acpi-io-base h# 4 + # dx mov dx al in h# 01 # al or al dx out \ Enable SCI
Author: wmb
Date: Thu Jul 1 19:23:54 2010
New Revision: 1850
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1850
Log:
SDHCI - Added ugly workaround for AData class 6 cards that hang
if you issue write-multiple commands too soon after a preceding read.
Modified:
dev/mmc/sdhci/sdhci.fth
Modified: dev/mmc/sdhci/sdhci.fth
==============================================================================
--- dev/mmc/sdhci/sdhci.fth Thu Jul 1 19:23:04 2010 (r1849)
+++ dev/mmc/sdhci/sdhci.fth Thu Jul 1 19:23:54 2010 (r1850)
@@ -897,6 +897,9 @@
r> r> 2drop ( block# )
read-multiple ( )
else ( block# r: #blocks fresh? )
+ \ Ugly ugly workaround for a problem with AData Class 6 SD cards
+ \ They hang (data timeout) if you start a write too soon after a read.
+ " d# 20 us" evaluate
r> if r> pre-write-erase else r> drop then ( block# )
write-multiple true to writing? ( )
then ( )