openfirmware July 2010

openfirmware@openfirmware.info

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[commit] r1858 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 20:06:06 2010 New Revision: 1858 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1858 Log: OLPC XO-1.5 - q3a41i - SLP ID in DSDT not SMBIOS. Modified: cpu/x86/pc/olpc/via/fw-version.fth Modified: cpu/x86/pc/olpc/via/fw-version.fth ============================================================================== --- cpu/x86/pc/olpc/via/fw-version.fth Thu Jul 1 20:02:43 2010 (r1857) +++ cpu/x86/pc/olpc/via/fw-version.fth Thu Jul 1 20:06:06 2010 (r1858) @@ -1,3 +1,3 @@ \ The overall firmware revision macro: FW_MAJOR A -macro: FW_MINOR 41h +macro: FW_MINOR 41i

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[commit] r1857 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 20:02:43 2010 New Revision: 1857 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1857 Log: OLPC XO-1.5 - DSDT - changed OEM name from OLPC to QUANTACOMPUTER to make Windows activation happier, using the "System Locked Preinstallation" (SLP) feature. This undoes svn 1848, which was an incorrect solution to the problem. The QUANTACOMPUTER OEM string needs to be in the DSDT instead of SMBIOS tables, according to the OEMBIOS.INI that we use. Modified: cpu/x86/pc/olpc/via/dsdt.dsl cpu/x86/pc/olpc/via/smbios.fth Modified: cpu/x86/pc/olpc/via/dsdt.dsl ============================================================================== --- cpu/x86/pc/olpc/via/dsdt.dsl Thu Jul 1 19:36:36 2010 (r1856) +++ cpu/x86/pc/olpc/via/dsdt.dsl Thu Jul 1 20:02:43 2010 (r1857) @@ -25,7 +25,7 @@ DefinitionBlock ("dsdt.aml", // AML file name "DSDT", // Table signature, DSDT 0x01, // Compliance Revision - "OLPC", // OEM ID + "QUANTACOMPUTER",// OEM ID "XO-1.5 ", // Table ID 0x00000001) // OEM Revision { Modified: cpu/x86/pc/olpc/via/smbios.fth ============================================================================== --- cpu/x86/pc/olpc/via/smbios.fth Thu Jul 1 19:36:36 2010 (r1856) +++ cpu/x86/pc/olpc/via/smbios.fth Thu Jul 1 20:02:43 2010 (r1857) @@ -394,7 +394,7 @@ pad h# 30 -leading -trailing ; -: +OEM ( adr -- adr' ) " QUANTACOMPUTER" +smbios$ ; +: +OLPC ( adr -- adr' ) " OLPC" +smbios$ ; : setup-smbios ( -- ) 0 to #smbios-tables 0 to portinfo# @@ -405,7 +405,7 @@ bios-info copy-smbios-table ( adr ) test-name$ +smbios$ test-version$ +smbios$ -\ +OEM +\ +OLPC \ fw-version$ +smbios$ fw-date$ +smbios$ end-smbios-table @@ -413,7 +413,7 @@ dup >r ( adr r: adr ) system-info copy-smbios-table ( adr r: adr ) get-uuid r> 8 + swap move ( adr ) - +OEM + +OLPC " XO" +smbios$ " 1.5" +smbios$ \ Version " SN" get-tag$ +smbios$ @@ -428,7 +428,7 @@ \ XXX might need to amend the security status field system-enclosure copy-smbios-table ( adr ) - +OEM + +OLPC " 1.5" +smbios$ \ Version end-smbios-table

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[commit] r1856 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:36:36 2010 New Revision: 1856 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1856 Log: Q3A41h (test version) Modified: cpu/x86/pc/olpc/via/fw-version.fth Modified: cpu/x86/pc/olpc/via/fw-version.fth ============================================================================== --- cpu/x86/pc/olpc/via/fw-version.fth Thu Jul 1 19:35:29 2010 (r1855) +++ cpu/x86/pc/olpc/via/fw-version.fth Thu Jul 1 19:36:36 2010 (r1856) @@ -1,3 +1,3 @@ \ The overall firmware revision macro: FW_MAJOR A -macro: FW_MINOR 41 +macro: FW_MINOR 41h

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[commit] r1855 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:35:29 2010 New Revision: 1855 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1855 Log: OLPC XO-1.5 - added VGA device to ACPI DSDT per Via's request. Thanks to Luna. Modified: cpu/x86/pc/olpc/via/dsdt.dsl Modified: cpu/x86/pc/olpc/via/dsdt.dsl ============================================================================== --- cpu/x86/pc/olpc/via/dsdt.dsl Thu Jul 1 19:34:33 2010 (r1854) +++ cpu/x86/pc/olpc/via/dsdt.dsl Thu Jul 1 19:35:29 2010 (r1855) @@ -2434,6 +2434,79 @@ } }//Device(HDAC) + Name(DEVA, 0x3) //Replace the CMOS location, Since T-SEG SMM can not call INT10 any more + + Device(VGA) // Device + { + Name(_ADR,0x10000) + Name(SWIT,0x1) + Method(_DOS,1) // Enable/Disable Output Switching + { + Store(Arg0, SWIT) // Store the argument as the switch + } + + Method(_INI,0) // Enable Initial display + { + // BIOS don't switch display, but change _DGS + // Video Extension is used to help in switching . + store(DEVA, Local1) + + + If( LNotEqual(And(Local1, 0x2), 0x00) ) // LCD Turn On + { + Store( 0x1, \_SB.PCI0.VGA.LCD._DGS) + } + Else + { + Store( 0x0, \_SB.PCI0.VGA.LCD._DGS) + } + } + + + Name(_DOD,Package() //Package + { + 0x00010110, //LCD, detectable by BIOS + }) + + Device(LCD) + { + Name(_ADR,0x0110) + Name(_DCS,0x1F) //Return the status of output device + Name(_DGS,1) //Query Graphics Desired State + Method(_DSS,1) // Device Set State + { + // Device Set State + If(And(Arg0,0xC0000000)) + { + //If Bit30=1, don't do actual switching, but change _DGS to next state. + If(LEqual(And(Arg0,0x40000000), 0x00)) + { + Store(Arg0, Local0) + Store(And(Local0,0x1),Local0) + Store(Not(0x1), Local1) + Store(And(\_SB.PCI0.VGA.LCD._DGS, Local1), \_SB.PCI0.VGA.LCD._DGS) + Store(Or(\_SB.PCI0.VGA.LCD._DGS, Local0),\_SB.PCI0.VGA.LCD._DGS) + } + } + } + Method(_BCL) { + Return(Package(0x8) { + 100, + 50, + 20, + 30, + 40, + 60, + 80, + 90, + }) + } + Method(_BCM, 1) { + // Store(Arg0, \_SB.PCI0.PIB.PORT80) + } + } + } + } // Device(PCI0) //-----------------------------------------------------------------------

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[commit] r1854 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:34:33 2010 New Revision: 1854 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1854 Log: OLPC XO-1.5 - perform additional PCI config register restoration by including startpcirestore.fth at the appropriate place in the resume-from-S3 sequence. Modified: cpu/x86/pc/olpc/via/romreset.bth Modified: cpu/x86/pc/olpc/via/romreset.bth ============================================================================== --- cpu/x86/pc/olpc/via/romreset.bth Thu Jul 1 19:32:54 2010 (r1853) +++ cpu/x86/pc/olpc/via/romreset.bth Thu Jul 1 19:34:33 2010 (r1854) @@ -248,6 +248,10 @@ ax jmp \ Jump in 32-bit protected mode then + \ This only works if prep-rm has already been executed; + \ otherwise it will hang trying to re-enable SMM + fload ${BP}/cpu/x86/pc/olpc/via/startpcirestore.fth \ SD host controller PCI BARs + facs-adr h# c + #) ax mov ax ax or 0<> if \ Resume in real mode for ACPI operating systems \ Linear wakeup address is in EAX

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[commit] r1853 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:32:54 2010 New Revision: 1853 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1853 Log: OLPC XO-1.5 - added commented-out code to early startup sequence to clear memory before starting Forth. It was a test for a page-fault-after-runin problem that was never fully diagnosed - but it seems to have disappeared with a new system build. (This message applies to the change to startmemtop.fth; the previous instance of this message was incorrectly attached to the initial checkin of startpcirestore.fth) Modified: cpu/x86/pc/olpc/via/startmemtop.fth Modified: cpu/x86/pc/olpc/via/startmemtop.fth ============================================================================== --- cpu/x86/pc/olpc/via/startmemtop.fth Thu Jul 1 19:31:17 2010 (r1852) +++ cpu/x86/pc/olpc/via/startmemtop.fth Thu Jul 1 19:32:54 2010 (r1853) @@ -19,3 +19,9 @@ bx mem-info-pa 4 + #) mov \ Top of memory +\ bx di mov +\ h# 800.0000 # di sub \ Clear the last 128 MB +\ h# 800.0000 4 / # cx mov \ Longword count +\ cld +\ ax ax xor +\ rep ax stos

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[commit] r1852 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:31:17 2010 New Revision: 1852 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1852 Log: The last revision message was in error. It should have read: OLPC XO-1.5 - restore some additional PCI configuration register settings when resuming Windows, particularly in the SD host controller" Modified: cpu/x86/pc/olpc/via/startpcirestore.fth Modified: cpu/x86/pc/olpc/via/startpcirestore.fth ============================================================================== --- cpu/x86/pc/olpc/via/startpcirestore.fth Thu Jul 1 19:25:39 2010 (r1851) +++ cpu/x86/pc/olpc/via/startpcirestore.fth Thu Jul 1 19:31:17 2010 (r1852) @@ -52,5 +52,4 @@ \ 64 88e5 config-wb \ 04 bit enables PCS1 \ acpi-io-base h# 2b + # dx mov dx al in h# 80 # al or al dx out \ Enable SMI on GPIO Range 1 access - \ acpi-io-base h# 4 + # dx mov dx al in h# 01 # al or al dx out \ Enable SCI

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[commit] r1851 - cpu/x86/pc/olpc/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:25:39 2010 New Revision: 1851 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1851 Log: OLPC XO-1.5 - added commented-out code to early startup sequence to clear memory before starting Forth. It was a test for a page-fault-after-runin problem that was never fully diagnosed - but it seems to have disappeared with a new system build. Added: cpu/x86/pc/olpc/via/startpcirestore.fth Added: cpu/x86/pc/olpc/via/startpcirestore.fth ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ cpu/x86/pc/olpc/via/startpcirestore.fth Thu Jul 1 19:25:39 2010 (r1851) @@ -0,0 +1,56 @@ +\ Restore PCI config registers + +8000.0000 6010 config-wl \ BAR 0 +8000.1000 6014 config-wl \ BAR 1 +8000.2000 6018 config-wl \ BAR 2 + 0016 6004 config-ww \ Enables + 0a 603c config-wb \ Interrupt line + + \ This is a workaround for an odd problem with the Via Vx855 chip. + \ You have to tell it to use 1.8 V, otherwise when you tell it + \ it to use 3.3V, it will use 1.8 V instead! You only have to + \ do this 1.8V thing once after power-up to fix it until the + \ next power cycle. The "fix" survives resets; it takes a power + \ cycle to break it again. + +\ First 1.8V +0a # al mov al 8000.0029 #) mov + al 8000.1029 #) mov + al 8000.2029 #) mov + +\ Then 3.3V +0e # al mov al 8000.0029 #) mov + al 8000.1029 #) mov + al 8000.2029 #) mov + +\ Then power on +0f # al mov al 8000.0029 #) mov + al 8000.1029 #) mov + al 8000.2029 #) mov + +\ 0e # al mov al 8000.0029 #) mov +\ al 8000.1029 #) mov +\ al 8000.2029 #) mov + + f9 6099 config-wb \ Two SD slots (correct for XP, wrong for Linux) + +\ \ Enable System Management Mode, assuming that the in-memory data structures are already set up +\ 21 383 config-wb \ Enable A/Bxxxx range as memory instead of frame buffer (with fxxxx region R/O) +\ 3b 386 config-wb \ 01 bit enables compatible SMM +\ 3b 8fe6 config-wb \ 02 bit enables high SMM + +\ acpi-io-base h# 2c + # dx mov dx al in h# 01 # al or al dx out \ Global SMI enable +\ acpi-io-base h# 2a + # dx mov dx al in h# 40 # al or al dx out \ Enable SMI on access to software SMI register +\ 0 acpi-io-base h# 2a + port-wb \ Trigger SMI; the "relocate the SMI base" handler is already installed + +\ 20 383 config-wb \ Restore A/Bxxxx range to its normal frame buffer usage + +\ \ Enable Real Mode gateway using System Management Mode +\ 0030 885e config-ww \ PCS3 I/O Port address (port 30) +\ f7 8864 config-wb \ f* sets PCS3 decode length to 16 bytes (ports 30-3f) +\ 03 8866 config-wb \ 02 bit enables PCS3 decoding +\ 64 88e5 config-wb \ 04 bit enables PCS1 + +\ acpi-io-base h# 2b + # dx mov dx al in h# 80 # al or al dx out \ Enable SMI on GPIO Range 1 access + +\ acpi-io-base h# 4 + # dx mov dx al in h# 01 # al or al dx out \ Enable SCI

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[commit] r1850 - dev/mmc/sdhci
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:23:54 2010 New Revision: 1850 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1850 Log: SDHCI - Added ugly workaround for AData class 6 cards that hang if you issue write-multiple commands too soon after a preceding read. Modified: dev/mmc/sdhci/sdhci.fth Modified: dev/mmc/sdhci/sdhci.fth ============================================================================== --- dev/mmc/sdhci/sdhci.fth Thu Jul 1 19:23:04 2010 (r1849) +++ dev/mmc/sdhci/sdhci.fth Thu Jul 1 19:23:54 2010 (r1850) @@ -897,6 +897,9 @@ r> r> 2drop ( block# ) read-multiple ( ) else ( block# r: #blocks fresh? ) + \ Ugly ugly workaround for a problem with AData Class 6 SD cards + \ They hang (data timeout) if you start a write too soon after a read. + " d# 20 us" evaluate r> if r> pre-write-erase else r> drop then ( block# ) write-multiple true to writing? ( ) then ( )

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[commit] r1849 - dev/via
by repository service 01 Jul '10

01 Jul '10

Author: wmb Date: Thu Jul 1 19:23:04 2010 New Revision: 1849 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1849 Log: OLPC XO-1.5 - SMI handler - added commented-out code for handling some soft SMIs that could be used in ACPI code for debugging. Modified: dev/via/smi.fth Modified: dev/via/smi.fth ============================================================================== --- dev/via/smi.fth Thu Jul 1 00:03:13 2010 (r1848) +++ dev/via/smi.fth Thu Jul 1 19:23:04 2010 (r1849) @@ -615,6 +615,13 @@ then [then] +\ h# 2f acpi-b@ case +\ 1 of ." Entered from ACPI _PTS " endof +\ 2 of ." Entered from ACPI _WAK " endof +\ ( default ) ." Entered with argument 0x" dup .x +\ endcase +\ ." - type 'resume' to return" cr + smi-interact ;

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openfirmware July 2010