Author: wmb
Date: Tue May 18 05:44:02 2010
New Revision: 1812
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1812
Log:
OLPC trac 10146 - tweak to last checkin for even more reliable timer selftest.
Modified:
cpu/x86/pc/olpc/timertest.fth
Modified: cpu/x86/pc/olpc/timertest.fth
==============================================================================
--- cpu/x86/pc/olpc/timertest.fth Tue May 18 01:31:18 2010 (r1811)
+++ cpu/x86/pc/olpc/timertest.fth Tue May 18 05:44:02 2010 (r1812)
@@ -9,7 +9,7 @@
\ depend on being able to see any specific value.
: wait-rollover ( -- error? )
get-msecs d# 100 + begin ( time-limit )
- 0 count@ 5 < if drop false exit then
+ 0 count@ 6 < if drop false exit then
dup get-msecs - ( time-limit diff )
0<= until
drop true
Author: wmb
Date: Tue May 18 01:31:18 2010
New Revision: 1811
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1811
Log:
OLPC trac 10146 - fixed reliability problem with ISA timer selftest.
Modified:
cpu/x86/pc/olpc/timertest.fth
Modified: cpu/x86/pc/olpc/timertest.fth
==============================================================================
--- cpu/x86/pc/olpc/timertest.fth Tue May 18 00:42:46 2010 (r1810)
+++ cpu/x86/pc/olpc/timertest.fth Tue May 18 01:31:18 2010 (r1811)
@@ -3,9 +3,13 @@
dev /isa/timer
+\ "0 count@" takes 4.5 uS on XO-1 and 6.3 uS on XO-1.5, due to the
+\ several I/O port accesses involved. That is longer than the per-count
+\ time, so the test for rollover needs some slop ("5 <") because you can't
+\ depend on being able to see any specific value.
: wait-rollover ( -- error? )
- get-msecs d# 200 + begin ( time-limit )
- 0 count@ 1 = if drop false exit then
+ get-msecs d# 100 + begin ( time-limit )
+ 0 count@ 5 < if drop false exit then
dup get-msecs - ( time-limit diff )
0<= until
drop true
@@ -20,14 +24,19 @@
then
then
- wait-rollover if
+ lock[ wait-rollover if
+ ]unlock
." The ISA PIT timer did not reach a count of 1." cr
true exit
then
- 1 ms
+ \ Ensure that rollover has completed so the first count below
+ \ is higher than the second count (the counter counts down).
+ d# 10 us
- 0 count@ d# 10000 d# 11000 between 0= if
+ 0 count@ 1 ms 0 count@ ]unlock - ( delta-ticks )
+
+ d# 1150 d# 1250 between 0= if \ Nominal delta is 1199
." The ISA PIT timer is ticking at the wrong rate." cr
true exit
then
Author: rsmith
Date: Sat May 8 12:06:53 2010
New Revision: 1805
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/1805
Log:
Pickup EC Ver 1.9.28
Modified:
cpu/x86/pc/olpc/via/ec-version.fth
Modified: cpu/x86/pc/olpc/via/ec-version.fth
==============================================================================
--- cpu/x86/pc/olpc/via/ec-version.fth Tue May 4 20:17:32 2010 (r1804)
+++ cpu/x86/pc/olpc/via/ec-version.fth Sat May 8 12:06:53 2010 (r1805)
@@ -1,5 +1,5 @@
\ The EC microcode
-macro: EC_VERSION 1_9_27
+macro: EC_VERSION 1_9_28
\ Alternate command for getting EC microcode, for testing new versions.
\ Temporarily uncomment the line and modify the path as necessary