[SeaBIOS] Issues with ASRock E350M1

Kevin O'Connor kevin at koconnor.net
Sun May 29 15:55:36 CEST 2011

On Sun, May 29, 2011 at 03:17:40AM -0500, Scott Duplichan wrote:
> I decided to try and debug this myself. The attached patch is what I
> came up with. Within the limitations of typing abilities, it is now
> perfect. No sluggishness and no dropped keys. The head == next check
> was failing when it should have passed. The reason is that the
> toggleCarry bit is often set in endpoint descriptor dword #2, at least
> on AMD hardware.

Thanks.  I slightly modified the patch and committed it.

>Hopefully this change is compatible with qemu, Intel,
> and other OHCI controllers.

I don't think there are any Intel OHCI controllers.  I tested it on
qemu and it looks fine.  If you're curious, testing on qemu looks

qemu -L biosdir -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios -fda odin1440.img -device pci-ohci -device usb-kbd


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