[coreboot] Change superio in "Bayley Bay FSP-based CRB"

[Zvi Vered]

Hi Jose, All,

According to lspci I modified devicetree.cp copied from the "Bay
Trail" reference:

1. Should I add the devices at the end of the list marked with # in
domain  1.2.3 ?
2. How can I know to set 'on' or 'off' ?

/*****************************************************************************************************
    device domain 0 on
        device pci 00.0 on end    # 8086 0F00 - SoC router
        device pci 02.0 on end    # 8086 0F31 - GFX
        device pci 12.0 on end    # 8086 0F16 - SD Port (SD3 pins)
        device pci 13.0 on end    # 8086 0F23 - SATA AHCI (0F20, 0F21,
0F22, 0F23)
        device pci 14.0 on end    # 8086 0F35 - USB XHCI - Only 1 USB
controller at a time
        device pci 17.0 on end    # 8086 0F50 - EMMC 4.5 Port (MMC1
pins) - Only 1 EMMC port at a time
        device pci 1b.0 on end    # 8086 0F04 - HD Audio
        device pci 1c.0 on end    # 8086 0F48 - PCIe Root Port 1 (x4 slot)
        device pci 1c.1 on end    # 8086 0F4A - PCIe Root Port 2 (half
mini pcie slot)
        device pci 1c.2 on end    # 8086 0F4C - PCIe Root Port 3 (front x1 slot)
        device pci 1c.3 on end    # 8086 0F4E - PCIe Root Port 4 (rear x1 slot)
        device pci 1d.0 off end    # 8086 0F34 - USB EHCI - Only 1 USB
controller at a time
        device pci 1f.0 on
            chip superio/winbond/w83627hf
                device pnp 2e.0 off #  Floppy
                    io 0x60 = 0x3f0
                    irq 0x70 = 6
                    drq 0x74 = 2
                end
                device pnp 2e.1 off #  Parallel Port
                    io 0x60 = 0x378
                    irq 0x70 = 7
                end
                device pnp 2e.2 on #  Com1
                    io 0x60 = 0x3f8
                    irq 0x70 = 4
                end
                device pnp 2e.3 on #  Com2
                    io 0x60 = 0x2f8
                    irq 0x70 = 3
                end
                device pnp 2e.5 on #  Keyboard
                    io 0x60 = 0x60
                    io 0x62 = 0x64
                    irq 0x70 = 1
                    irq 0x72 = 12
                end
                device pnp 2e.6 off  # SFI
                    io 0x62 = 0x100
                end
                device pnp 2e.7 off #  GPIO_GAME_MIDI
                    io 0x60 = 0x220
                    io 0x62 = 0x300
                    irq 0x70 = 9
                end
                device pnp 2e.8 off end #  WDTO_PLED
                device pnp 2e.9 off end #  GPIO_SUSLED
                device pnp 2e.a off end #  ACPI
                device pnp 2e.b on #  HW Monitor
                    io 0x60 = 0x290
                    irq 0x70 = 5
                end
            end    #superio/winbond/w83627hf
        end    # 8086 0F1C - LPC bridge
        device pci 1f.3 on end    # 8086 0F12 - SMBus 0
   end
#01:00.0 0604: 10b5:8505
#02:01.0 0604: 10b5:8505
#02:02.0 0604: 10b5:8505
#02:03.0 0604: 10b5:8505
#02:04.0 0604: 10b5:8505
#03:00.0 0604: 10b5:8112
#0a:00.0 0200: 8086:157b
*********************************************************************************************************/

Thank you very much,
Zvika
On Mon, Oct 8, 2018 at 10:16 AM Jose Trujillo <ce.autom at protonmail.com> wrote:
>
> Hello Zvika,
>
> Add your device in Konfig and configure it under devicetree.
> Look for examples and/or previous threads in this mail list.
>
> Jose.
>
> ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
> On Monday, October 8, 2018 12:02 AM, Zvi Vered <veredz72 at gmail.com> wrote:
>
> > Hello,
> >
> > I have to port coreboot to a "Bay Trail" board (KONTRON).
> > I selected "Bayley Bay FSP-based CRB" as a reference.
> >
> > In my board, the output of superiotool is:
> > Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e
> >
> > But the configuration of the reference board is:
> > *** Super I/O ***
> >
> > How can I change it ?
> >
> > I wish there was a basic configuration that could be easily modified.
> >
> > Thank you,
> > Zvika
> >
> > ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
> >
> > coreboot mailing list: coreboot at coreboot.org
> > https://mail.coreboot.org/mailman/listinfo/coreboot
>
>