[coreboot] SATA init on FSP 2.0 for Skylake

[Zheng Bao]

I met the same problem. I use the FSP1.1 and the 0:17h:0 disappears after raminit.
It seems that the FSP disable the SATA.

The SATA device can be disabled if SCFD is set. But it can not re-enable.

SATA Controller Function Disable (SCFD): BIOS program this bit to 1 to disable
the SATA Controller function. When 0, SATA Controller function is enabled. When
disable, SATA Host Controller will not claimed the register access targeting its
Configuration Space. In IOSF primary Fabric Decode scheme, it's expected BIOS also
program the corresponding bit used by the Fabric Decoder accordingly hence both
SATA SIP and Fabric Decoder are in sync, and BIOS need to program this bit before
programming the one in Fabric Decoder. Once this bit is set, BIOS isnot able to revert
it back to Function Enable until next round of platform reset.


Zheng

________________________________
From: coreboot <coreboot-bounces at coreboot.org> on behalf of roman perepelitsin <perepelitsin.roman at gmail.com>
Sent: Wednesday, March 28, 2018 2:51 PM
To: coreboot at coreboot.org
Subject: [coreboot] SATA init on FSP 2.0 for Skylake

Hi!
I got a little problem with SATA controller in H110 Skylake PCH (desktop). SATA device geographical address - 0:17h:0 on PCI, and it enabled via devicetree.cb. This params correctly send in FspSiliconInit. After this coreboot run PCI bus scan. And my SATA device return 0xffffffff on PCI read config cycles. I search in Intel datasheet for specific SATA disable pin or something else, but there is no methods that can make SATA inactive. Maybe somebody advice about it?



--
regards,
Perepelitsin Roman
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