[coreboot] riscv: How to debug

[王翔]

I try to debug coreboot with **spike**. 
I has apply the **8250 usart patch** to **spike**.
But I get from the official website of the code can not pass the test.
I found some BUG when I debug this.
I want to submit the code but I can't test it. What can i do,  who can help me.


I get code from `https://review.coreboot.org/coreboot.git`







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王翔

安全研究员

广州市腾御安信息科技有限公司





广州市天河区珠江新城华穗路406号保利克洛维二期中景A座1020-1024
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