[coreboot] Lenovo Thinkpad X201: coreboot with me_cleaner

Mono lists+coreboot at donderklumpen.de
Mon Jul 10 12:40:55 CEST 2017


Hallo

I have tested coreboot with me_cleaner on a Thinkpad X201i but got stuck loading the payload.
More precise, I've applied GNUtoo's patch [1] to coreboot master 25dbc17a. Actually I did not try without the patch.
Building coreboot with the full 5MB ME extracted from vendor bios works ok (with a GRUB2 payload).
But cleaning the rom image produced by coreboot or building a rom image with a cleaned ME file, both results in not loading the payload. The full coreboot console captured via EHCI is attached to this email.
It seems RAM init passes. the log shows: 

ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Sending DID Ack to BIOS

So it seems that cleaning ME was successful, no?

But coreboot finishes with the following output:

BS: BS_WRITE_TABLES times (us): entry 28752 run 329595 exit 23
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 44940 size 479ea
Loading segment from ROM address 0xffd44a78
  code (compression=1)
  New segment dstaddr 0x8200 memsize 0x17844 srcaddr 0xffd44acc filesize 0x83ae
Loading segment from ROM address 0xffd44a94
  code (compression=1)
  New segment dstaddr 0x100000 memsize 0xebccc srcaddr 0xffd4ce7a filesize 0x3f5e8
Loading segment from ROM address 0xffd44ab0
  Entry Point 0x00008200
Payload being loaded at below 1MiB without region being marked as RAM usable.
SELF Payload doesn't target RAM:
Failed Segment: 0x100000, 965836 bytes
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 00000000bf69e000-00000000bf7fffff: CONFIGURATION TABLES
 2. 00000000d0000000-00000000dfffffff: RESERVED
Payload not loaded.

I expected it to load a GURB2 payload which worked before applying me_cleaner. Any idea why it does not and how I could fix it?

greets Mono

[1] https://mail.coreboot.org/pipermail/coreboot/2017-March/083798.html 
-------------- next part --------------
USB


coreboot-4.6-652-g25dbc17a36-dirty Thu Jul  6 08:51:24 UTC 2017 romstage starting...
PM1_CNT: 00001c00
SMBus controller enabled.
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
SMBus controller enabled.
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: picked entry 0 from cache block
reg2ca9_bit0 = 0
reg274265[0][0] = 5
reg274265[0][1] = 5
reg274265[0][2] = e
reg274265[1][0] = 5
reg274265[1][1] = 5
reg274265[1][2] = e
[6dc] <= 23faff
[6e8] <= 23faff
USB
017 romstage starting...
PM1_CNT: 00001c00
SMBus controller enabled.
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
SMBus controller enabled.
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: picked entry 0 from cache block
Timings:
channel 0, slot 0, rank 0
lane 0: 4 (4) 71 (71) 62 (62) 7f (7f) 
lane 1: 4 (4) 63 (63) 61 (61) 7b (7b) 
lane 2: 5 (5) 72 (72) 79 (79) 93 (93) 
lane 3: 4 (4) 53 (53) 4c (4c) 69 (69) 
lane 4: 7 (7) ba (ba) aa (aa) c5 (c5) 
lane 5: 6 (6) 9a (9a) 7f (7f) 9a (9a) 
lane 6: 5 (5) aa (aa) 97 (97) b3 (b3) 
lane 7: 4 (4) a7 (a7) 89 (89) a3 (a3) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
channel 0, slot 0, rank 1
lane 0: 5 (5) 69 (69) 61 (61) 7e (7e) 
lane 1: 5 (5) 5f (5f) 5f (5f) 79 (79) 
lane 2: 5 (5) 71 (71) 74 (74) 8f (8f) 
lane 3: 5 (5) 54 (54) 4c (4c) 69 (69) 
lane 4: 7 (7) b8 (b8) a9 (a9) c5 (c5) 
lane 5: 6 (6) 97 (97) 7b (7b) 96 (96) 
lane 6: 4 (4) a8 (a8) 95 (95) b2 (b2) 
lane 7: 5 (5) a8 (a8) 86 (86) a0 (a0) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
channel 1, slot 0, rank 0
lane 0: 5 (5) 8c (8c) 64 (64) 7d (7d) 
lane 1: 6 (6) 82 (82) 61 (61) 78 (78) 
lane 2: 6 (6) 9a (9a) 76 (76) 8f (8f) 
lane 3: 5 (5) 72 (72) 51 (51) 6a (6a) 
lane 4: 5 (5) da (da) b1 (b1) c9 (c9) 
lane 5: 4 (4) bf (bf) 83 (83) 9e (9e) 
lane 6: 6 (6) ca (ca) 99 (99) b2 (b2) 
lane 7: 6 (6) cb (cb) 8e (8e) a6 (a6) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
channel 1, slot 0, rank 1
lane 0: 5 (5) 8d (8d) 66 (66) 7f (7f) 
lane 1: 6 (6) 80 (80) 5f (5f) 76 (76) 
lane 2: 6 (6) 98 (98) 76 (76) 90 (90) 
lane 3: 5 (5) 73 (73) 50 (50) 69 (69) 
lane 4: 5 (5) dc (dc) b1 (b1) ca (ca) 
lane 5: 5 (5) ba (ba) 83 (83) 9d (9d) 
lane 6: 6 (6) cf (cf) 9c (9c) b6 (b6) 
lane 7: 6 (6) cc (cc) 8f (8f) a7 (a7) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
[178] = 0 (0)
[10b] = 1 (1)
Timings:
channel 0, slot 0, rank 0
lane 0: 4 (4) 71 (71) 62 (62) 7f (7f) 
lane 1: 4 (4) 63 (63) 61 (61) 7b (7b) 
lane 2: 5 (5) 72 (72) 79 (79) 93 (93) 
lane 3: 4 (4) 53 (53) 4c (4c) 69 (69) 
lane 4: 7 (7) ba (ba) aa (aa) c5 (c5) 
lane 5: 6 (6) 9a (9a) 7f (7f) 9a (9a) 
lane 6: 5 (5) aa (aa) 97 (97) b3 (b3) 
lane 7: 4 (4) a7 (a7) 89 (89) a3 (a3) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
channel 0, slot 0, rank 1
lane 0: 5 (5) 69 (69) 61 (61) 7e (7e) 
lane 1: 5 (5) 5f (5f) 5f (5f) 79 (79) 
lane 2: 5 (5) 71 (71) 74 (74) 8f (8f) 
lane 3: 5 (5) 54 (54) 4c (4c) 69 (69) 
lane 4: 7 (7) b8 (b8) a9 (a9) c5 (c5) 
lane 5: 6 (6) 97 (97) 7b (7b) 96 (96) 
lane 6: 4 (4) a8 (a8) 95 (95) b2 (b2) 
lane 7: 5 (5) a8 (a8) 86 (86) a0 (a0) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
channel 1, slot 0, rank 0
lane 0: 5 (5) 8c (8c) 64 (64) 7d (7d) 
lane 1: 6 (6) 82 (82) 61 (61) 78 (78) 
lane 2: 6 (6) 9a (9a) 76 (76) 8f (8f) 
lane 3: 5 (5) 72 (72) 51 (51) 6a (6a) 
lane 4: 5 (5) da (da) b1 (b1) c9 (c9) 
lane 5: 4 (4) bf (bf) 83 (83) 9e (9e) 
lane 6: 6 (6) ca (ca) 99 (99) b2 (b2) 
lane 7: 6 (6) cb (cb) 8e (8e) a6 (a6) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
channel 1, slot 0, rank 1
lane 0: 5 (5) 8d (8d) 66 (66) 7f (7f) 
lane 1: 6 (6) 80 (80) 5f (5f) 76 (76) 
lane 2: 6 (6) 98 (98) 76 (76) 90 (90) 
lane 3: 5 (5) 73 (73) 50 (50) 69 (69) 
lane 4: 5 (5) dc (dc) b1 (b1) ca (ca) 
lane 5: 5 (5) ba (ba) 83 (83) 9d (9d) 
lane 6: 6 (6) cf (cf) 9c (9c) b6 (b6) 
lane 7: 6 (6) cc (cc) 8f (8f) a7 (a7) 
lane 8: 15 (15) 100 (100) 80 (80) 80 (80) 
[178] = 0 (0)
[10b] = 1 (1)
CBMEM:
IMD: root @ bf7ff000 254 entries.
IMD: root @ bf7fec00 62 entries.
[6dc] = 23faff
[6e8] = 23faff
Relocate MRC DATA from fefceff4 to bf7dd000 (1472 bytes)
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Sending DID Ack to BIOS
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2ff00 size 149e2
USB
6 08:51:24 UTC 2017 ramstage starting...
Moving GDT to bf7fe7c0...ok
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.2: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 164e.3: enabled 1
PNP: 164e.2: enabled 0
PNP: 164e.7: enabled 0
PNP: 164e.19: enabled 0
PNP: 0c31.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
Compare with tree...
Root Device: enabled 1
 PNP: 00ff.1: enabled 1
 PNP: 00ff.2: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:16.2: enabled 1
  PCI: 00:19.0: enabled 1
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.3: enabled 1
  PCI: 00:1c.4: enabled 1
  PCI: 00:1d.0: enabled 1
  PCI: 00:1f.0: enabled 1
   PNP: 164e.3: enabled 1
   PNP: 164e.2: enabled 0
   PNP: 164e.7: enabled 0
   PNP: 164e.19: enabled 0
   PNP: 0c31.0: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
   I2C: 00:54: enabled 1
   I2C: 00:55: enabled 1
   I2C: 00:56: enabled 1
   I2C: 00:57: enabled 1
   I2C: 00:5c: enabled 1
   I2C: 00:5d: enabled 1
   I2C: 00:5e: enabled 1
   I2C: 00:5f: enabled 1
 ... pmbase = 0x0500
Root Device scanning...
root_dev_scan_bus for Root Device
PNP: 00ff.1 enabled
recv_ec_data: 0x36
recv_ec_data: 0x51
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x30
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x12
recv_ec_data: 0x03
recv_ec_data: 0x10
recv_ec_data: 0x11
EC Firmware ID 6QHT30WW-3.18, Version 1.01B
recv_ec_data: 0x00
recv_ec_data: 0x00
recv_ec_data: 0x10
recv_ec_data: 0x20
recv_ec_data: 0x30
recv_ec_data: 0x00
recv_ec_data: 0xa6
recv_ec_data: 0xa6
recv_ec_data: 0x70
dock is not connected
PNP: 00ff.2 enabled
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/006a] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0045] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0046] enabled
PCI: 00:16.0 [8086/0000] ops
PCI: 00:16.0 [8086/3b64] enabled
PCI: Static device PCI: 00:16.2 not found, disabling it.
PCI: 00:19.0 [8086/10ea] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/3b3c] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/3b56] enabled
Capability: type 0x10 @ 0x40
Capability: type 0x05 @ 0x80
Capability: type 0x0d @ 0x90
Capability: type 0x01 @ 0xa0
Capability: type 0x10 @ 0x40
PCI: 00:1c.0 subordinate bus PCI Express
PCI: 00:1c.0 [8086/3b42] enabled
Capability: type 0x10 @ 0x40
Capability: type 0x05 @ 0x80
Capability: type 0x0d @ 0x90
Capability: type 0x01 @ 0xa0
Capability: type 0x10 @ 0x40
PCI: 00:1c.1 subordinate bus PCI Express
PCI: 00:1c.1 [8086/3b44] enabled
Capability: type 0x10 @ 0x40
Capability: type 0x05 @ 0x80
Capability: type 0x0d @ 0x90
Capability: type 0x01 @ 0xa0
Capability: type 0x10 @ 0x40
PCI: 00:1c.3 subordinate bus PCI Express
PCI: 00:1c.3 [8086/3b48] enabled
Capability: type 0x10 @ 0x40
Capability: type 0x05 @ 0x80
Capability: type 0x0d @ 0x90
Capability: type 0x01 @ 0xa0
Capability: type 0x10 @ 0x40
PCI: 00:1c.4 subordinate bus PCI Express
PCI: 00:1c.4 [8086/3b4a] enabled
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/3b34] enabled
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] enabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/3b07] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/3b2e] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/3b30] enabled
PCI: 00:1f.6 [8086/0000] ops
PCI: 00:1f.6 [8086/3b32] enabled
PCI: 00:01.0 scanning...
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:01.0 took 3268 usecs
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:1c.0 took 3273 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 03
scan_bus: scanning of bus PCI: 00:1c.1 took 3273 usecs
PCI: 00:1c.3 scanning...
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 04
scan_bus: scanning of bus PCI: 00:1c.3 took 3273 usecs
PCI: 00:1c.4 scanning...
do_pci_scan_bridge for PCI: 00:1c.4
PCI: pci_scan_bus for bus 05
PCI: 05:00.0 [168c/002e] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.4 took 10876 usecs
PCI: 00:1e.0 scanning...
do_pci_scan_bridge for PCI: 00:1e.0
PCI: pci_scan_bus for bus 06
scan_bus: scanning of bus PCI: 00:1e.0 took 3283 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 164e.3 enabled
PNP: 164e.2 disabled
PNP: 164e.7 disabled
PNP: 164e.19 disabled
PNP: 0c31.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 6999 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 15499 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 135616 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 166235 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 233737 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
More than one caller of pci_ehci_read_resources from PCI: 00:1a.0
PCI: 00:1c.0 read_resources bus 2 link: 0
PCI: 00:1c.0 read_resources bus 2 link: 0 done
PCI: 00:1c.1 read_resources bus 3 link: 0
PCI: 00:1c.1 read_resources bus 3 link: 0 done
PCI: 00:1c.3 read_resources bus 4 link: 0
PCI: 00:1c.3 read_resources bus 4 link: 0 done
PCI: 00:1c.4 read_resources bus 5 link: 0
PCI: 00:1c.4 read_resources bus 5 link: 0 done
PCI: 00:1d.0 EHCI BAR hook registered
PCI: 00:1e.0 read_resources bus 6 link: 0
PCI: 00:1e.0 read_resources bus 6 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 0c31.0 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 PNP: 00ff.1
  PNP: 00ff.1
  PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
  PNP: 00ff.2
  PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
  PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
  PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
  PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags d0001201 index 18
   PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.2
   PCI: 00:19.0
   PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.1
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.3
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.4 child on link 0 PCI: 05:00.0
   PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 05:00.0
    PCI: 05:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1f.0 child on link 0 PNP: 164e.3
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
   PCI: 00:1f.0 resource base 1680 size 1c align 0 gran 0 limit 0 flags c0040100 index 10000400
    PNP: 164e.3
    PNP: 164e.3 resource base 200 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 164e.3 resource base b0 size 0 align 0 gran 0 limit 0 flags c0000400 index 29
    PNP: 164e.3 resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 164e.3 resource base 82 size 0 align 0 gran 0 limit 0 flags c0000400 index f0
    PNP: 164e.2
    PNP: 164e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
    PNP: 164e.7
    PNP: 164e.7 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 60
    PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 164e.19
    PNP: 164e.19 resource base 0 size 2 align 1 gran 1 limit ffff flags 100 index 60
    PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 0c31.0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:19.0 18 *  [0x0 - 0x1f] io
PCI: 00:1f.2 20 *  [0x20 - 0x3f] io
PCI: 00:02.0 20 *  [0x40 - 0x47] io
PCI: 00:1f.2 10 *  [0x48 - 0x4f] io
PCI: 00:1f.2 18 *  [0x50 - 0x57] io
PCI: 00:1f.2 14 *  [0x58 - 0x5b] io
PCI: 00:1f.2 1c *  [0x5c - 0x5f] io
DOMAIN: 0000 io: base: 60 size: 60 align: 5 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 05:00.0 10 *  [0x0 - 0xffff] mem
PCI: 00:1c.4 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 10 *  [0x0 - 0x3fffff] mem
PCI: 00:1c.4 20 *  [0x400000 - 0x4fffff] mem
PCI: 00:19.0 10 *  [0x500000 - 0x51ffff] mem
PCI: 00:1b.0 10 *  [0x520000 - 0x523fff] mem
PCI: 00:19.0 14 *  [0x524000 - 0x524fff] mem
PCI: 00:1f.6 10 *  [0x525000 - 0x525fff] mem
PCI: 00:1f.2 24 *  [0x526000 - 0x5267ff] mem
PCI: 00:1a.0 10 *  [0x527000 - 0x5273ff] mem
PCI: 00:1d.0 10 *  [0x528000 - 0x5283ff] mem
PCI: 00:1f.3 10 *  [0x529000 - 0x5290ff] mem
PCI: 00:16.0 10 *  [0x52a000 - 0x52a00f] mem
DOMAIN: 0000 mem: base: 52a010 size: 52a010 align: 22 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:02.0 18 base d0000000 limit dfffffff prefmem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
constrain_resources: PCI: 00:1f.0 10000400 base 00001680 limit 0000169b io (fixed)
skipping PNP: 164e.3 at 29 fixed resource, size=0!
skipping PNP: 164e.3 at f0 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000169c limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base cf800000 limit cfffffff
Setting resources...
DOMAIN: 0000 io: base:169c size:60 align:5 gran:0 limit:ffff
PCI: 00:19.0 18 *  [0x1800 - 0x181f] io
PCI: 00:1f.2 20 *  [0x1820 - 0x183f] io
PCI: 00:02.0 20 *  [0x1840 - 0x1847] io
PCI: 00:1f.2 10 *  [0x1848 - 0x184f] io
PCI: 00:1f.2 18 *  [0x1850 - 0x1857] io
PCI: 00:1f.2 14 *  [0x1858 - 0x185b] io
PCI: 00:1f.2 1c *  [0x185c - 0x185f] io
DOMAIN: 0000 io: next_base: 1860 size: 60 align: 5 gran: 0 done
PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.3 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:cf800000 size:52a010 align:22 gran:0 limit:cfffffff
PCI: 00:02.0 10 *  [0xcf800000 - 0xcfbfffff] mem
PCI: 00:1c.4 20 *  [0xcfc00000 - 0xcfcfffff] mem
PCI: 00:19.0 10 *  [0xcfd00000 - 0xcfd1ffff] mem
PCI: 00:1b.0 10 *  [0xcfd20000 - 0xcfd23fff] mem
PCI: 00:19.0 14 *  [0xcfd24000 - 0xcfd24fff] mem
PCI: 00:1f.6 10 *  [0xcfd25000 - 0xcfd25fff] mem
PCI: 00:1f.2 24 *  [0xcfd26000 - 0xcfd267ff] mem
PCI: 00:1a.0 10 *  [0xcfd27000 - 0xcfd273ff] mem
PCI: 00:1d.0 10 *  [0xcfd28000 - 0xcfd283ff] mem
PCI: 00:1f.3 10 *  [0xcfd29000 - 0xcfd290ff] mem
PCI: 00:16.0 10 *  [0xcfd2a000 - 0xcfd2a00f] mem
DOMAIN: 0000 mem: next_base: cfd2a010 size: 52a010 align: 22 gran: 0 done
PCI: 00:01.0 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:01.0 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:01.0 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.0 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.0 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.1 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.1 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.3 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.3 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.4 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.4 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.4 mem: base:cfc00000 size:100000 align:20 gran:20 limit:cfcfffff
PCI: 05:00.0 10 *  [0xcfc00000 - 0xcfc0ffff] mem
PCI: 00:1c.4 mem: next_base: cfc10000 size: 100000 align: 20 gran: 20 done
PCI: 00:1e.0 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1e.0 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1e.0 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1e.0 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00cf800000 - 0x00cfbfffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 20 <- [0x0000001840 - 0x0000001847] size 0x00000008 gran 0x03 io
PCI: 00:16.0 10 <- [0x00cfd2a000 - 0x00cfd2a00f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x00cfd00000 - 0x00cfd1ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00cfd24000 - 0x00cfd24fff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000001800 - 0x000000181f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00cfd27000 - 0x00cfd273ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00cfd20000 - 0x00cfd23fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:1c.3 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1c.3 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:1c.4 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:1c.4 20 <- [0x00cfc00000 - 0x00cfcfffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 00:1c.4 assign_resources, bus 5 link: 0
PCI: 05:00.0 10 <- [0x00cfc00000 - 0x00cfc0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:1c.4 assign_resources, bus 5 link: 0
PCI: 00:1d.0 EHCI Debug Port hook triggered
PCI: 00:1d.0 10 <- [0x00cfd28000 - 0x00cfd283ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 EHCI Debug Port relocated
PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:1e.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:1e.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 06 mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 164e.3 60 <- [0x0000000200 - 0x0000000207] size 0x00000008 gran 0x03 io
PNP: 164e.3 29 <- [0x00000000b0 - 0x00000000af] size 0x00000000 gran 0x00 irq
PNP: 164e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PNP: 164e.3 f0 <- [0x0000000082 - 0x0000000081] size 0x00000000 gran 0x00 irq
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000001848 - 0x000000184f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001858 - 0x000000185b] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001850 - 0x0000001857] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x000000185c - 0x000000185f] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001820 - 0x000000183f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00cfd26000 - 0x00cfd267ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00cfd29000 - 0x00cfd290ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.6 10 <- [0x00cfd25000 - 0x00cfd25fff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 PNP: 00ff.1
  PNP: 00ff.1
  PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
  PNP: 00ff.2
  PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
  PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
  PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
  PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 169c size 60 align 5 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base cf800000 size 52a010 align 22 gran 0 limit cfffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:01.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
   PCI: 00:01.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base cf800000 size 400000 align 22 gran 22 limit cfbfffff flags 60000201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags d0001201 index 18
   PCI: 00:02.0 resource base 1840 size 8 align 3 gran 3 limit 1847 flags 60000100 index 20
   PCI: 00:16.0
   PCI: 00:16.0 resource base cfd2a000 size 10 align 12 gran 4 limit cfd2a00f flags 60000201 index 10
   PCI: 00:16.2
   PCI: 00:19.0
   PCI: 00:19.0 resource base cfd00000 size 20000 align 17 gran 17 limit cfd1ffff flags 60000200 index 10
   PCI: 00:19.0 resource base cfd24000 size 1000 align 12 gran 12 limit cfd24fff flags 60000200 index 14
   PCI: 00:19.0 resource base 1800 size 20 align 5 gran 5 limit 181f flags 60000100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base cfd27000 size 400 align 12 gran 10 limit cfd273ff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base cfd20000 size 4000 align 14 gran 14 limit cfd23fff flags 60000201 index 10
   PCI: 00:1c.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
   PCI: 00:1c.1
   PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.1 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
   PCI: 00:1c.1 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
   PCI: 00:1c.3
   PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.3 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
   PCI: 00:1c.3 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
   PCI: 00:1c.4 child on link 0 PCI: 05:00.0
   PCI: 00:1c.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.4 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
   PCI: 00:1c.4 resource base cfc00000 size 100000 align 20 gran 20 limit cfcfffff flags 60080202 index 20
    PCI: 05:00.0
    PCI: 05:00.0 resource base cfc00000 size 10000 align 16 gran 16 limit cfc0ffff flags 60000201 index 10
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base cfd28000 size 400 align 12 gran 10 limit cfd283ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1e.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
   PCI: 00:1e.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
   PCI: 00:1f.0 child on link 0 PNP: 164e.3
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
   PCI: 00:1f.0 resource base 1680 size 1c align 0 gran 0 limit 0 flags c0040100 index 10000400
    PNP: 164e.3
    PNP: 164e.3 resource base 200 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 164e.3 resource base b0 size 0 align 0 gran 0 limit 0 flags e0000400 index 29
    PNP: 164e.3 resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 164e.3 resource base 82 size 0 align 0 gran 0 limit 0 flags e0000400 index f0
    PNP: 164e.2
    PNP: 164e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
    PNP: 164e.7
    PNP: 164e.7 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 60
    PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 164e.19
    PNP: 164e.19 resource base 0 size 2 align 1 gran 1 limit ffff flags 100 index 60
    PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 0c31.0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 1848 size 8 align 3 gran 3 limit 184f flags 60000100 index 10
   PCI: 00:1f.2 resource base 1858 size 4 align 2 gran 2 limit 185b flags 60000100 index 14
   PCI: 00:1f.2 resource base 1850 size 8 align 3 gran 3 limit 1857 flags 60000100 index 18
   PCI: 00:1f.2 resource base 185c size 4 align 2 gran 2 limit 185f flags 60000100 index 1c
   PCI: 00:1f.2 resource base 1820 size 20 align 5 gran 5 limit 183f flags 60000100 index 20
   PCI: 00:1f.2 resource base cfd26000 size 800 align 12 gran 11 limit cfd267ff flags 60000200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base cfd29000 size 100 align 12 gran 8 limit cfd290ff flags 60000201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base cfd25000 size 1000 align 12 gran 12 limit cfd25fff flags 60000201 index 10
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 910249 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/2193
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 17aa/215a
PCI: 00:02.0 cmd <- 03
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/2153
PCI: 00:19.0 cmd <- 03
PCI: 00:1a.0 subsystem <- 17aa/2163
PCI: 00:1a.0 cmd <- 02
PCI: 00:1b.0 subsystem <- 17aa/215e
PCI: 00:1b.0 cmd <- 02
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 cmd <- 00
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 cmd <- 00
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 cmd <- 00
PCI: 00:1c.4 bridge ctrl <- 0003
PCI: 00:1c.4 cmd <- 06
PCI: 00:1d.0 subsystem <- 17aa/2163
PCI: 00:1d.0 cmd <- 02
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 cmd <- 00
pch_decode_init
PCI: 00:1f.0 subsystem <- 17aa/2166
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/2168
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/2167
PCI: 00:1f.3 cmd <- 03
PCI: 00:1f.6 cmd <- 02
PCI: 05:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 34250 exit 0
Initializing devices...
Root Device init ...
starting SPI configuration
SPI configured
Root Device init finished in 2250 usecs
PNP: 00ff.2 init ...
PNP: 00ff.2 init finished in 746 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 0011869e(001360e0)
Installing SMM handler to 0xbf800000
Loading module at bf810000 with entry bf8101b6. filesize: 0x1398 memsize: 0x53c0
Processing 66 relocs. Offset value of 0xbf810000
Loading module at bf808000 with entry bf808000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0xbf808000
SMM Module: placing jmp sequence at bf807c00 rel16 0x03fd
SMM Module: placing jmp sequence at bf807800 rel16 0x07fd
SMM Module: placing jmp sequence at bf807400 rel16 0x0bfd
SMM Module: stub loaded at bf808000. Will call bf8101b6(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: MCSMI GPI PM1 
PM1_STS: WAK BM TMROF 
GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 
ALT_GP_SMI_STS: GPI14 GPI11 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
In relocation handler: cpu 0
New SMBASE=0xbf800000 IEDBASE=0xbfc00000 @ 0003fc00
Writing SMRR. base = 0xbf800006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 20655
CPU: family 06, model 25, stepping 05
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: 'cpu_microcode_blob.bin' not found.
CPU: Intel(R) Core(TM) i3 CPU       M 370  @ 2.40GHz.
CPU:lapic=0, boot_cpu=1
MTRR: Physical address space:
0x00000000cf800000 - 0x00000000d0000000 size 0x00800000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
MTRR: Fixed MSR 0x250 0x0000000000000000
MTRR: Fixed MSR 0x258 0x0000000000000000
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0000000000000000
MTRR: Fixed MSR 0x269 0x0000000000000000
MTRR: Fixed MSR 0x26a 0x0000000000000000
MTRR: Fixed MSR 0x26b 0x0000000000000000
MTRR: Fixed MSR 0x26c 0x0000000000000000
MTRR: Fixed MSR 0x26d 0x0000000000000000
MTRR: Fixed MSR 0x26e 0x0000000000000000
MTRR: Fixed MSR 0x26f 0x0000000000000000
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 3/1.
MTRR: UC selected as default type.
MTRR: 0 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
model_x06ax: frequency set to 2394
Turbo is unavailable
CPU: 0 has 2 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base 0012f000, stack_end 0012fff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
Startup point 1.
New SMBASE=0xbf7ffc00 IEDBASE=0xbfc00000 @ 0003fc00
Waiting for send to finish...
Writing SMRR. base = 0xbf800006, mask=0xff800800
+Initializing CPU #1
Sending STARTUP #2 to 1.
CPU: vendor Intel device 20655
After apic_write.
CPU: family 06, model 25, stepping 05
Startup point 1.
Enabling cache
Waiting for send to finish...
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
After Startup.
CPU: 0 has core 4
CBFS: 'cpu_microcode_blob.bin' not found.
CPU2: stack_base 0012e000, stack_end 0012eff8
CPU: Intel(R) Core(TM) i3 CPU       M 370  @ 2.40GHz.
CPU:lapic=1, boot_cpu=0
MTRR: Fixed MSR 0x250 0x0000000000000000
Asserting INIT.
MTRR: Fixed MSR 0x258 0x0000000000000000
Waiting for send to finish...
MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0000000000000000
Deasserting INIT.
MTRR: Fixed MSR 0x269 0x0000000000000000
Waiting for send to finish...
MTRR: Fixed MSR 0x26a 0x0000000000000000
+MTRR: Fixed MSR 0x26b 0x0000000000000000
#startup loops: 2.
MTRR: Fixed MSR 0x26c 0x0000000000000000
Sending STARTUP #1 to 4.
MTRR: Fixed MSR 0x26d 0x0000000000000000
After apic_write.
MTRR: Fixed MSR 0x26e 0x0000000000000000
In relocation handler: cpu 2
MTRR: Fixed MSR 0x26f 0x0000000000000000
New SMBASE=0xbf7ff800 IEDBASE=0xbfc00000 @ 0003fc00
Startup point 1.
Writing SMRR. base = 0xbf800006, mask=0xff800800
call enable_fixed_mtrr()
Initializing CPU #2
CPU physical address size: 36 bits
CPU: vendor Intel device 20655

MTRR check
CPU: family 06, model 25, stepping 05
Fixed MTRRs   : Waiting for send to finish...
Enabled
Enabling cache
Variable MTRRs: +CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
Enabled
CBFS: Locating 'cpu_microcode_blob.bin'

Sending STARTUP #2 to 4.
CBFS: 'cpu_microcode_blob.bin' not found.
Setting up local APIC...CPU: Intel(R) Core(TM) i3 CPU       M 370  @ 2.40GHz.
 apic_id: 0x01 CPU:lapic=4, boot_cpu=0
done.
MTRR: Fixed MSR 0x250 0x0000000000000000
After apic_write.
MTRR: Fixed MSR 0x258 0x0000000000000000
Startup point 1.
MTRR: Fixed MSR 0x259 0x0000000000000000
Waiting for send to finish...
VMX status: enabled, locked
MTRR: Fixed MSR 0x268 0x0000000000000000
model_x06ax: frequency set to 2394
MTRR: Fixed MSR 0x269 0x0000000000000000
CPU #1 initialized
MTRR: Fixed MSR 0x26a 0x0000000000000000
+MTRR: Fixed MSR 0x26b 0x0000000000000000
After Startup.
MTRR: Fixed MSR 0x26c 0x0000000000000000
CPU: 0 has core 5
MTRR: Fixed MSR 0x26d 0x0000000000000000
CPU3: stack_base 0012d000, stack_end 0012dff8
MTRR: Fixed MSR 0x26e 0x0000000000000000
MTRR: Fixed MSR 0x26f 0x0000000000000000
Asserting INIT.
call enable_fixed_mtrr()
Waiting for send to finish...
CPU physical address size: 36 bits
+
MTRR check
Deasserting INIT.
Fixed MTRRs   : Waiting for send to finish...
Enabled
+Variable MTRRs: #startup loops: 2.
Enabled
Sending STARTUP #1 to 5.

After apic_write.
Setting up local APIC...In relocation handler: cpu 3
 apic_id: 0x04 Startup point 1.
done.
New SMBASE=0xbf7ff400 IEDBASE=0xbfc00000 @ 0003fc00
Waiting for send to finish...
Writing SMRR. base = 0xbf800006, mask=0xff800800
+VMX status: enabled, locked
Sending STARTUP #2 to 5.
Initializing CPU #3
After apic_write.
model_x06ax: frequency set to 2394
Startup point 1.
CPU: vendor Intel device 20655
Waiting for send to finish...
CPU: family 06, model 25, stepping 05
+Enabling cache
After Startup.
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CPU #0 initialized
CBFS: Locating 'cpu_microcode_blob.bin'
Waiting for 2 CPUS to stop
CPU #2 initialized
CBFS: 'cpu_microcode_blob.bin' not found.
Waiting for 1 CPUS to stop
CPU: Intel(R) Core(TM) i3 CPU       M 370  @ 2.40GHz.
CPU:lapic=5, boot_cpu=0
MTRR: Fixed MSR 0x250 0x0000000000000000
MTRR: Fixed MSR 0x258 0x0000000000000000
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0000000000000000
MTRR: Fixed MSR 0x269 0x0000000000000000
MTRR: Fixed MSR 0x26a 0x0000000000000000
MTRR: Fixed MSR 0x26b 0x0000000000000000
MTRR: Fixed MSR 0x26c 0x0000000000000000
MTRR: Fixed MSR 0x26d 0x0000000000000000
MTRR: Fixed MSR 0x26e 0x0000000000000000
MTRR: Fixed MSR 0x26f 0x0000000000000000
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x05 done.
VMX status: enabled, locked
model_x06ax: frequency set to 2394
CPU #3 initialized
All AP CPUs stopped (3333 loops)
CPU0: stack: 00130000 - 00131000, lowest used address 00130a90, stack used: 1392 bytes
CPU1: stack: 0012f000 - 00130000, lowest used address 0012fc54, stack used: 940 bytes
CPU2: stack: 0012e000 - 0012f000, lowest used address 0012ec54, stack used: 940 bytes
CPU3: stack: 0012d000 - 0012e000, lowest used address 0012dc54, stack used: 940 bytes
CPU_CLUSTER: 0 init finished in 506771 usecs
PCI: 00:00.0 init ...
PCI: 00:00.0 init finished in 1811 usecs
PCI: 00:02.0 init ...
GT Power Management Init
IVB GT1 Power Meter Weights
GT init timeout
Initializing VGA without OPROM. MMIO 0xcf800000
EDID:
00 ff ff ff ff ff ff 00 30 ae 11 40 00 00 00 00 
00 13 01 03 80 1a 10 78 ea 5c d5 93 5c 5e 8e 27 
1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 
01 01 01 01 01 01 ee 1a 00 80 50 20 10 30 10 30 
13 00 05 a3 10 00 00 19 d0 17 00 c6 50 20 19 30 
30 20 36 00 05 a3 10 00 00 19 00 00 00 0f 00 81 
0a 3c 81 0a 32 16 09 00 4c a3 41 54 00 00 00 fe 
00 4c 54 4e 31 32 31 41 54 30 37 4c 30 32 00 38 
Extracted contents:
header:          00 ff ff ff ff ff ff 00
serial number:   30 ae 11 40 00 00 00 00 00 13
version:         01 03
basic params:    80 1a 10 78 ea
chroma info:     5c d5 93 5c 5e 8e 27 1c 50 54
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    ee 1a 00 80 50 20 10 30 10 30 13 00 05 a3 10 00 00 19
descriptor 2:    d0 17 00 c6 50 20 19 30 30 20 36 00 05 a3 10 00 00 19
descriptor 3:    00 00 00 0f 00 81 0a 3c 81 0a 32 16 09 00 4c a3 41 54
descriptor 4:    00 00 00 fe 00 4c 54 4e 31 32 31 41 54 30 37 4c 30 32
extensions:      00
checksum:        38

Manufacturer: LEN Model 4011 Serial Number 0
Made week 0 of 2009
EDID version: 1.3
Digital display
Maximum image size: 26 cm x 16 cm
Gamma: 220%
Check DPMS levels
DPMS levels: Standby Suspend Off
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: ee1a0080502010301030130005a310000019
Detailed mode (IN HEX): Clock 68940 KHz, 105 mm x a3 mm
               0500 0510 0540 0580 hborder 0
               0320 0321 0324 0330 vborder 0
               -hsync -vsync 
Did detailed timing
Hex of detail: d01700c6502019303020360005a310000019
Detailed mode (IN HEX): Clock 60960 KHz, 105 mm x a3 mm
               0500 0530 0550 05c6 hborder 0
               0320 0323 0329 0339 vborder 0
               -hsync -vsync 
Hex of detail: 0000000f00810a3c810a321609004ca34154
Manufacturer-specified data, tag 15
Hex of detail: 000000fe004c544e313231415430374c3032
ASCII string: LTN121AT07L02
Checksum
Checksum: 0x38 (valid)
WARNING: EDID block does NOT fully conform to EDID 1.3.
	Missing name descriptor
	Missing monitor ranges
bringing up panel at resolution 1280 x 800
Borders 0 x 0
Blank 128 x 16
Sync 48 x 3
Front porch 16 x 1
Spread spectrum clock
Single channel
Polarities 1, 1
Data M1=1204813, N1=8388608
Link frequency 270000 kHz
Link M1=133868, N1=524288
Pixel N=8, M1=24, M2=9, P1=2
Pixel clock 138214 kHz
waiting for panel powerup
panel powered up
GT Power Management Init (post VBIOS)
GT init timeout
PCI: 00:02.0 init finished in 384029 usecs
PCI: 00:16.0 init ...
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Sending DID Ack to BIOS
ME: BIOS path: Recovery
PCI: 00:16.0 init finished in 36620 usecs
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 1735 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 4367 usecs
PCI: 00:1b.0 init ...
Azalia: base = cfd20000
Azalia: V1CTL disabled.
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862804
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 14f15069
Azalia: verb_size: 44
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 26798 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 4459 usecs
PCI: 00:1e.0 init ...
PCI init.
PCI: 00:1e.0 init finished in 2941 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x01
IOAPIC: Dumping registers
  reg 0x0000: 0x01000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
Mobile 5 PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
PCI: 00:1f.0 init finished in 32495 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: cfd26000
PCI: 00:1f.2 init finished in 8193 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 1934 usecs
PCI: 00:1f.6 init ...
Thermal init start.
Thermal init done.
PCI: 00:1f.6 init finished in 4617 usecs
PCI: 05:00.0 init ...
PCI: 05:00.0 init finished in 1828 usecs
PNP: 164e.3 init ...
PNP: 164e.3 init finished in 1726 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 3451 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 3475 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 3475 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 3476 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 31473 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 3495 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 3475 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 3475 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.2: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 164e.3: enabled 1
PNP: 164e.2: enabled 0
PNP: 164e.7: enabled 0
PNP: 164e.19: enabled 0
PNP: 0c31.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.6: enabled 1
PCI: 05:00.0: enabled 1
APIC: 01: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
BS: BS_DEV_INIT times (us): entry 5 run 1234241 exit 23
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 23 run 2976 exit 23
BS: BS_OS_RESUME_CHECK times (us): entry 22 run 90 exit 22
Updating MRC cache data.
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: picked entry 0 from cache block
MRC data in flash is up to date. No update.
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 12640 size 3833
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bf6b0000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Digitizer state forced as absent
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at bf69f000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = bf6b3f80
GET_VBIOS: aa55 8086 0 0 3
 ... VBIOS found at 000c0000
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 24512 bytes.
smbios_write_tables: bf69e000
recv_ec_data: 0x36
recv_ec_data: 0x51
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x30
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x12
recv_ec_data: 0x03
Root Device (LENOVO ThinkPad X201)
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
PNP: 00ff.2 (Lenovo H8 EC)
CPU_CLUSTER: 0 (Intel i7 (Nehalem) integrated Northbridge)
APIC: 00 (Intel Nehalem CPU)
DOMAIN: 0000 (Intel i7 (Nehalem) integrated Northbridge)
PCI: 00:00.0 (Intel i7 (Nehalem) integrated Northbridge)
PCI: 00:02.0 (Intel i7 (Nehalem) integrated Northbridge)
PCI: 00:16.2 (unknown)
PCI: 00:19.0 (unknown)
PCI: 00:1a.0 (unknown)
PCI: 00:1b.0 (unknown)
PCI: 00:1c.0 (unknown)
PCI: 00:1c.1 (unknown)
PCI: 00:1c.3 (unknown)
PCI: 00:1c.4 (unknown)
PCI: 00:1d.0 (unknown)
PCI: 00:1f.0 (unknown)
PNP: 164e.3 (NSC PC87382 Docking LPC Switch)
PNP: 164e.2 (NSC PC87382 Docking LPC Switch)
PNP: 164e.7 (NSC PC87382 Docking LPC Switch)
PNP: 164e.19 (NSC PC87382 Docking LPC Switch)
PNP: 0c31.0 (unknown)
PCI: 00:1f.2 (unknown)
PCI: 00:1f.3 (unknown)
I2C: 01:54 (AT24RF08C)
I2C: 01:55 (AT24RF08C)
I2C: 01:56 (AT24RF08C)
I2C: 01:57 (AT24RF08C)
I2C: 01:5c (AT24RF08C)
I2C: 01:5d (AT24RF08C)
I2C: 01:5e (AT24RF08C)
I2C: 01:5f (AT24RF08C)
PCI: 00:01.0 (unknown)
PCI: 00:16.0 (unknown)
PCI: 00:1e.0 (unknown)
PCI: 00:1f.6 (unknown)
PCI: 05:00.0 (unknown)
APIC: 01 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
SMBIOS tables: 437 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 71
Writing coreboot table at 0xbf6d4000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 00000000bf69e000-00000000bf7fffff: CONFIGURATION TABLES
 2. 00000000d0000000-00000000dfffffff: RESERVED
Manufacturer: c2
SF: Detected MX25L6405D with sector size 0x1000, total 0x800000
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
FMAP: Found "FLASH" version 1.1 at 500000.
FMAP: base = ff800000 size = 800000 #areas = 3
Wrote coreboot table at: bf6d4000, 0x284 bytes, checksum 856a
coreboot table: 668 bytes.
IMD ROOT    0. bf7ff000 00001000
IMD SMALL   1. bf7fe000 00001000
CONSOLE     2. bf7de000 00020000
MRC DATA    3. bf7dd000 000005d0
ACPI RESUME 4. bf6dc000 00101000
COREBOOT    5. bf6d4000 00008000
ACPI        6. bf6b0000 00024000
ACPI GNVS   7. bf6af000 00001000
TCPA LOG    8. bf69f000 00010000
SMBIOS      9. bf69e000 00000800
IMD small region:
  IMD ROOT    0. bf7fec00 00000400
  CAR GLOBALS 1. bf7fea40 000001c0
  USBDEBUG    2. bf7fe9e0 00000058
  ROMSTAGE    3. bf7fe9c0 00000004
  GDT         4. bf7fe7c0 00000200
BS: BS_WRITE_TABLES times (us): entry 28752 run 329595 exit 23
CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 44940 size 479ea
Loading segment from ROM address 0xffd44a78
  code (compression=1)
  New segment dstaddr 0x8200 memsize 0x17844 srcaddr 0xffd44acc filesize 0x83ae
Loading segment from ROM address 0xffd44a94
  code (compression=1)
  New segment dstaddr 0x100000 memsize 0xebccc srcaddr 0xffd4ce7a filesize 0x3f5e8
Loading segment from ROM address 0xffd44ab0
  Entry Point 0x00008200
Payload being loaded at below 1MiB without region being marked as RAM usable.
SELF Payload doesn't target RAM:
Failed Segment: 0x100000, 965836 bytes
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 00000000bf69e000-00000000bf7fffff: CONFIGURATION TABLES
 2. 00000000d0000000-00000000dfffffff: RESERVED
Payload not loaded.


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