[coreboot] patch: set dbe62 to have com2 on com1 address
c-d.hailfinger.devel.2006 at gmx.net
Wed Mar 5 17:09:57 CET 2008
On 05.03.2008 17:01, ron minnich wrote:
> On Wed, Mar 5, 2008 at 5:22 AM, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> If you look at the dbe61 dts, you can see the same settings except that
>> dbe61 additionally sets com2_irq = "4".
> and there is a good question. I might have misread the v2 code, I will
> have to go back and check.
> But will com2 still interrupt on irq 3 no matter what? I'm never sure
> how things go on this chipset.
southbridge/amd/cs5536/cs5536.c: msr.lo |= sb->com2_irq << 28;
southbridge/amd/cs5536/dts: com2_irq = "3";
The default is irq 3, can be overridden in the mainboard dts.
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