[coreboot] patch: set dbe62 to have com2 on com1 address
rminnich at gmail.com
Wed Mar 5 17:01:08 CET 2008
On Wed, Mar 5, 2008 at 5:22 AM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:
> If you look at the dbe61 dts, you can see the same settings except that
> dbe61 additionally sets com2_irq = "4".
and there is a good question. I might have misread the v2 code, I will
have to go back and check.
But will com2 still interrupt on irq 3 no matter what? I'm never sure
how things go on this chipset.
More information about the coreboot