[coreboot-gerrit] Change in coreboot[master]: dynamic UART initialization for cavium cn8100
Jens Drenhaus (Code Review)
gerrit at coreboot.org
Tue Oct 9 13:08:10 CEST 2018
Jens Drenhaus has uploaded this change for review. ( https://review.coreboot.org/28975
Change subject: dynamic UART initialization for cavium cn8100
......................................................................
dynamic UART initialization for cavium cn8100
Change-Id: I145c224148f0cc078bb1c76f588f603e73121a62
Signed-off-by: Jens Drenhaus <jens.drenhaus at 9elements.com>
---
M src/mainboard/cavium/cn8100_sff_evb/mainboard.c
M src/mainboard/opencellular/elgon/mainboard.c
M src/soc/cavium/cn81xx/soc.c
3 files changed, 27 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/28975/1
diff --git a/src/mainboard/cavium/cn8100_sff_evb/mainboard.c b/src/mainboard/cavium/cn8100_sff_evb/mainboard.c
index 28a3ee3..ce896f2 100644
--- a/src/mainboard/cavium/cn8100_sff_evb/mainboard.c
+++ b/src/mainboard/cavium/cn8100_sff_evb/mainboard.c
@@ -83,12 +83,6 @@
{
size_t i;
- /* Init UARTs */
- for (i = 0; i < 4; i++) {
- if (!uart_is_enabled(i))
- uart_setup(i, 0);
- }
-
/* Init timer */
soc_timer_init();
diff --git a/src/mainboard/opencellular/elgon/mainboard.c b/src/mainboard/opencellular/elgon/mainboard.c
index dc06bdc..45a7155 100644
--- a/src/mainboard/opencellular/elgon/mainboard.c
+++ b/src/mainboard/opencellular/elgon/mainboard.c
@@ -101,12 +101,6 @@
{
size_t i;
- /* Init UARTs */
- for (i = 0; i < 4; i++) {
- if (!uart_is_enabled(i))
- uart_setup(i, 0);
- }
-
/* Init timer */
soc_timer_init();
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index d9eb052..2e9d837 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -24,6 +24,7 @@
#include <soc/clock.h>
#include <soc/sdram.h>
#include <soc/timer.h>
+#include <soc/uart.h>
#include <stddef.h>
#include <stdlib.h>
#include <string.h>
@@ -207,6 +208,21 @@
printk(BIOS_ERR, "%s: Node not found. OS might miss-behave !\n",
__func__);
+ /* Remove unused UART entries */
+ for (i = 0; i < 4; i++) {
+ char path[32];
+ const uint64_t addr = UAAx_PF_BAR0(i);
+ /* Remove the node */
+ snprintf(path, sizeof(path), "soc at 0/serial@%llx", addr);
+ dt_node = dt_find_node_by_path(tree->root, path, NULL, NULL, 0);
+ if (!dt_node || uart_is_enabled(i)) {
+ printk(BIOS_INFO, "%s: ignoring %s\n", __func__, path);
+ continue;
+ }
+ printk(BIOS_INFO, "%s: Removing node %s\n", __func__, path);
+ list_remove(&dt_node->list_node);
+ }
+
/* Remove unused PEM entries */
for (i = 0; i < 8; i++) {
char path[32];
@@ -374,6 +390,17 @@
}
}
+ /* Init UARTs */
+ size_t i;
+ struct device *child;
+ for (i = 0; i <= 3; i++) {
+ child = dev_find_slot(1, PCI_DEVFN(8, i));
+ if (child && child->enabled) {
+ if (!uart_is_enabled(i))
+ uart_setup(i, 0);
+ }
+ }
+
if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE))
soc_init_atf();
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I145c224148f0cc078bb1c76f588f603e73121a62
Gerrit-Change-Number: 28975
Gerrit-PatchSet: 1
Gerrit-Owner: Jens Drenhaus <jens.drenhaus at 9elements.com>
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