[coreboot-gerrit] Change in coreboot[master]: sb/intel/common: Add common reset handler

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/28862 )

Change subject: sb/intel/common: Add common reset handler
......................................................................


Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/28862/2/src/southbridge/intel/common/reset.c
File src/southbridge/intel/common/reset.c:

https://review.coreboot.org/#/c/28862/2/src/southbridge/intel/common/reset.c@28
PS2, Line 28: FULL_RST
This would issue a power-cycle reset, which is usually unwanted.
I'm also not sure if it's valid to set it w/o SYS_RST.

Also worth to mention: I've seen different patterns regarding this
register. Older platforms set the configuration bits (FULL_RST and 
or SYS_RST) first and then again with RST_CPU in a second outb().
It's still unclear (also not documented explicitly) if this is
needed, but it doesn't hurt. So I'd prefer two outb() calls unless
_all_ affected platforms did a single call before.



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I8e359b0c4d5a1060edd0940d24c2f78dfed8a590
Gerrit-Change-Number: 28862
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot at felixheld.de>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Wed, 03 Oct 2018 13:40:12 +0000
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