[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
build bot (Jenkins) (Code Review)
gerrit at coreboot.org
Wed Oct 3 10:59:36 CEST 2018
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28890 )
Change subject: soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
......................................................................
Patch Set 2:
(10 comments)
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
File src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@592
PS2, Line 592: #define GPP_I0 189
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@593
PS2, Line 593: #define GPP_I1 190
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@594
PS2, Line 594: #define GPP_I2 191
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@595
PS2, Line 595: #define GPP_I3 192
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@596
PS2, Line 596: #define GPP_I4 193
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@597
PS2, Line 597: #define GPP_I5 194
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@598
PS2, Line 598: #define GPP_I6 195
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@599
PS2, Line 599: #define GPP_I7 196
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@600
PS2, Line 600: #define GPP_I8 197
please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h@601
PS2, Line 601: #define GPP_I9 198
please, no space before tabs
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I496ec059de125b97c646581bbd3b8bfe6ffa641e
Gerrit-Change-Number: 28890
Gerrit-PatchSet: 2
Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Wed, 03 Oct 2018 08:59:36 +0000
Gerrit-HasComments: Yes
Gerrit-HasLabels: No
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