[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/skylake: Add device settings for PL4 power limit

[PraveenX Hodagatta Pranesh (Code Review)]

PraveenX Hodagatta Pranesh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29808


Change subject: soc/intel/skylake: Add device settings for PL4 power limit
......................................................................

soc/intel/skylake: Add device settings for PL4 power limit

PL4 is a preemptive CPU package peak power limit,it will never be exceeded.
Power is preemptively lowered before limit is reached.

This change provides option in devicetree and feeds FSP PowerLimit4 UPD for
power limit purpose.

Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh at intel.com>
Change-Id: I64b5a029104a102e5741e8b37c7992f2693180e8
---
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
2 files changed, 4 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/29808/1

diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index b1ffcb2..21dddd4 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -97,6 +97,9 @@
 	/* TCC activation offset */
 	int tcc_offset;
 
+	/* Power Limit Related */
+	u32 PowerLimit4;
+
 	/* PL2 Override value in Watts */
 	u32 tdp_pl2_override;
 	/* PL1 Override value in Watts */
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 8a78348..18c2aef 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -369,6 +369,7 @@
 
 	tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi;
 	tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock;
+	tconfig->PowerLimit4 = config->PowerLimit4;
 	/*
 	 * To disable HECI, the Psf needs to be left unlocked
 	 * by FSP till end of post sequence. Based on the devicetree

-- 
To view, visit https://review.coreboot.org/c/coreboot/+/29808
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I64b5a029104a102e5741e8b37c7992f2693180e8
Gerrit-Change-Number: 29808
Gerrit-PatchSet: 1
Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh at intel.com>
Gerrit-MessageType: newchange
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20181123/2fa12b3d/attachment-0001.html>