[coreboot-gerrit] Change in coreboot[master]: mb/emulation/qemu-i440fx|q35: Switch to C_ENVIRONMENT_BOOTBLOCK
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Sun Nov 11 12:57:39 CET 2018
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/29578
Change subject: mb/emulation/qemu-i440fx|q35: Switch to C_ENVIRONMENT_BOOTBLOCK
......................................................................
mb/emulation/qemu-i440fx|q35: Switch to C_ENVIRONMENT_BOOTBLOCK
Useful for testing stuff in C_ENVIRONMENT_BOOTBLOCK, like
VBOOT with separate verstage.
Change-Id: Ibf341002c36d868b9b44c8b37381fa78ae5c4381
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/cpu/qemu-x86/Kconfig
M src/cpu/qemu-x86/Makefile.inc
A src/cpu/qemu-x86/bootblock.c
R src/cpu/qemu-x86/cache_as_ram_bootblock.S
M src/mainboard/emulation/qemu-i440fx/Kconfig
M src/mainboard/emulation/qemu-i440fx/Makefile.inc
M src/mainboard/emulation/qemu-i440fx/romstage.c
M src/mainboard/emulation/qemu-q35/Kconfig
M src/mainboard/emulation/qemu-q35/romstage.c
9 files changed, 85 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/29578/1
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index ab8e1a9..70cce9b 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -21,3 +21,4 @@
select ARCH_RAMSTAGE_X86_32
select SMP
select UDELAY_TSC
+ select C_ENVIRONMENT_BOOTBLOCK
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc
index 288eea6..8ddaa81 100644
--- a/src/cpu/qemu-x86/Makefile.inc
+++ b/src/cpu/qemu-x86/Makefile.inc
@@ -12,6 +12,8 @@
## GNU General Public License for more details.
##
+bootblock-y += cache_as_ram_bootblock.S
+bootblock-y += bootblock.c
ramstage-y += qemu.c
subdirs-y += ../x86/mtrr
subdirs-y += ../x86/lapic
diff --git a/src/cpu/qemu-x86/bootblock.c b/src/cpu/qemu-x86/bootblock.c
new file mode 100644
index 0000000..2a4c028
--- /dev/null
+++ b/src/cpu/qemu-x86/bootblock.c
@@ -0,0 +1,21 @@
+#include <bootblock_common.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/mtrr.h>
+#include <console/console.h>
+#include <cpu/x86/bist.h>
+
+asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist);
+
+asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
+{
+ post_code(0x05);
+
+ /* Halt if there was a built in self test failure */
+ if (bist) {
+ console_init();
+ report_bist_failure(bist);
+ }
+
+ /* Call lib/bootblock.c main */
+ bootblock_main_with_timestamp(base_timestamp, NULL, 0);
+}
diff --git a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
similarity index 67%
rename from src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
rename to src/cpu/qemu-x86/cache_as_ram_bootblock.S
index d36341c..9b9f070 100644
--- a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
@@ -20,8 +20,8 @@
#define CPU_PHYSMASK_HI (1 << (CONFIG_CPU_ADDR_BITS - 32) - 1)
- /* Save the BIST result. */
- movl %eax, %ebp
+.global bootblock_pre_c_entry
+bootblock_pre_c_entry:
cache_as_ram:
post_code(0x20)
@@ -37,27 +37,32 @@
* of big ramstages. The ramstage will load its own %esp so
* there is no harm in using this value.
*/
- movl $0xa0000, %eax
+ movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
movl %eax, %esp
-
- /* Restore the BIST result. */
- movl %ebp, %eax
+ /* Align the stack and keep aligned for call to bootblock_c_entry() */
+ and $0xfffffff0, %esp
movl %esp, %ebp
+
+ /* Clear the cache memory region. This will also clear CAR GLOBAL */
+ movl $CONFIG_DCACHE_RAM_BASE, %esi
+ movl %esi, %edi
+ movl $(CONFIG_DCACHE_RAM_SIZE >> 2), %ecx
+ xorl %eax, %eax
+ rep stosl
+
+ /* Restore the BIST result and timestamps. */
+ movd %mm0, %ebx
+ movd %mm1, %eax
+ movd %mm2, %edx
+
+ pushl %ebx
+ pushl %edx
pushl %eax
-before_romstage:
+before_c_entry:
post_code(0x29)
- /* Call romstage.c main function. */
- call romstage_main
-
- post_code(0x30)
-
-__main:
- post_code(POST_PREPARE_RAMSTAGE)
- cld /* Clear direction flag. */
-
- call copy_and_run
-
+ call bootblock_c_entry_bist
+ /* Never returns */
.Lhlt:
post_code(POST_DEAD_CODE)
hlt
diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig
index fc56ab6..0b113cc 100644
--- a/src/mainboard/emulation/qemu-i440fx/Kconfig
+++ b/src/mainboard/emulation/qemu-i440fx/Kconfig
@@ -12,6 +12,7 @@
select BOARD_ROMSIZE_KB_256
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
+ select BOOTBLOCK_CONSOLE
config MAINBOARD_DIR
string
@@ -25,12 +26,23 @@
int
default 6
+# Skip the first 64KiB as coreboot table pointer is installed
+# at address 0
config DCACHE_RAM_BASE
hex
- default 0xd0000
+ default 0x10000
+# Memory at 0xa0000 decodes to VGA
config DCACHE_RAM_SIZE
hex
- default 0x10000
+ default 0x90000
+
+config DCACHE_BSP_STACK_SIZE
+ hex
+ default 0x4000
+
+config C_ENV_BOOTBLOCK_SIZE
+ hex
+ default 0x4000
endif # BOARD_EMULATION_QEMU_X86_I440FX
diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.inc b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
index c986667..38e5237 100644
--- a/src/mainboard/emulation/qemu-i440fx/Makefile.inc
+++ b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
@@ -1,4 +1,4 @@
-cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+romstage-y += romstage.c
ramstage-y += northbridge.c
ramstage-y += fw_cfg.c
romstage-y += memory.c
diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c
index 9530621..3432a00 100644
--- a/src/mainboard/emulation/qemu-i440fx/romstage.c
+++ b/src/mainboard/emulation/qemu-i440fx/romstage.c
@@ -16,30 +16,17 @@
#include <stdint.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <timestamp.h>
-#include <delay.h>
-#include <cpu/x86/lapic.h>
+#include <program_loading.h>
-
-void *asmlinkage romstage_main(unsigned long bist)
+asmlinkage void car_stage_entry(void)
{
- int cbmem_was_initted;
-
- /* init_timer(); */
- post_code(0x05);
-
console_init();
- /* Halt if there was a built in self test failure */
- report_bist_failure(bist);
+ cbmem_recovery(0);
- cbmem_was_initted = !cbmem_recovery(0);
-
- timestamp_init(timestamp_get());
timestamp_add_now(TS_START_ROMSTAGE);
- /* Emulation uses fixed low stack during ramstage. */
- return NULL;
+ run_ramstage();
}
diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig
index 10b5a93..5aee4ec 100644
--- a/src/mainboard/emulation/qemu-q35/Kconfig
+++ b/src/mainboard/emulation/qemu-q35/Kconfig
@@ -11,6 +11,7 @@
select BOARD_ROMSIZE_KB_2048
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
+ select BOOTBLOCK_CONSOLE
config MAINBOARD_DIR
string
@@ -28,17 +29,28 @@
hex
default 0xb0000000
+# Skip the first 64KiB as coreboot table pointer is installed
+# at address 0
config DCACHE_RAM_BASE
hex
- default 0xd0000
+ default 0x10000
+# Memory at 0xa0000 decodes to VGA
config DCACHE_RAM_SIZE
hex
- default 0x10000
+ default 0x90000
# Do not show IFD/blob options since QEMU doesn't care
config HAVE_INTEL_FIRMWARE
bool
default n
+config DCACHE_BSP_STACK_SIZE
+ hex
+ default 0x4000
+
+config C_ENV_BOOTBLOCK_SIZE
+ hex
+ default 0x4000
+
endif # BOARD_EMULATION_QEMU_X86_Q35
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c
index deb94af..38ae0ca 100644
--- a/src/mainboard/emulation/qemu-q35/romstage.c
+++ b/src/mainboard/emulation/qemu-q35/romstage.c
@@ -16,32 +16,19 @@
#include <stdint.h>
#include <cbmem.h>
#include <console/console.h>
-#include <southbridge/intel/i82801ix/i82801ix.h>
-#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <timestamp.h>
-#include <delay.h>
-#include <cpu/x86/lapic.h>
+#include <southbridge/intel/i82801ix/i82801ix.h>
+#include <program_loading.h>
-
-void * asmlinkage romstage_main(unsigned long bist)
+asmlinkage void car_stage_entry(void)
{
- int cbmem_was_initted;
-
- /* init_timer(); */
- post_code(0x05);
-
i82801ix_early_init();
console_init();
- /* Halt if there was a built in self test failure */
- report_bist_failure(bist);
+ cbmem_recovery(0);
- cbmem_was_initted = !cbmem_recovery(0);
-
- timestamp_init(timestamp_get());
timestamp_add_now(TS_START_ROMSTAGE);
- /* Emulation uses fixed low stack during ramstage. */
- return NULL;
+ run_ramstage();
}
--
To view, visit https://review.coreboot.org/29578
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ibf341002c36d868b9b44c8b37381fa78ae5c4381
Gerrit-Change-Number: 29578
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20181111/41b8d6eb/attachment-0001.html>
More information about the coreboot-gerrit
mailing list