[coreboot-gerrit] Change in coreboot[master]: soc/intel/icelake: Make correct IRQ mapping for ICL SA and PCH PCI de...

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/29508 )

Change subject: soc/intel/icelake: Make correct IRQ mapping for ICL SA and PCH PCI devices
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Patch Set 3:

(1 comment)

https://review.coreboot.org/#/c/29508/3/src/soc/intel/icelake/acpi/pci_irqs.asl
File src/soc/intel/icelake/acpi/pci_irqs.asl:

https://review.coreboot.org/#/c/29508/3/src/soc/intel/icelake/acpi/pci_irqs.asl@137
PS3, Line 137: Return (^PICN)
these are supposed to be PIC interrupts, which are relative to the PRT A-H settings (at least on older hardware). Is this not configurable anymore or what is the reason behind this change, which hardcodes them?



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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: Idec00c3b8a97cb5aa7b4000840aba914aea478c9
Gerrit-Change-Number: 29508
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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