[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/braswell/southcluster.c: Configure IO APIC

[Frans Hendriks (Code Review)]

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/29423 )

Change subject: src/soc/intel/braswell/southcluster.c: Configure IO APIC
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Patch Set 3:

> Patch Set 3:
> 
> (2 comments)

The area need to be reserved to ensure no other use of this area. It might work without this area, but to be ACPI compliant coreboot must claim used areas. 
In comment of CBFS_SIZE mentioned it defaults span the whole ROM.

The use of IO_APIC is in same style of RCBA (at least for braswell). You mean the RCBAxx() macro style used on some other platforms?


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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d
Gerrit-Change-Number: 29423
Gerrit-PatchSet: 3
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
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