[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/braswell/southcluster.c: Configure IO APIC

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29423 )

Change subject: src/soc/intel/braswell/southcluster.c: Configure IO APIC
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Patch Set 3:

> > Patch Set 3:
 > >
 > > (2 comments)
 > 
 > The area need to be reserved to ensure no other use of this area.
 > It might work without this area, but to be ACPI compliant coreboot
 > must claim used areas.
 > In comment of CBFS_SIZE mentioned it defaults span the whole ROM.
 > 
"It defaults to span the whole ROM on all but Intel systems that use an Intel Firmware Descriptor."
On vboot enabled systems CBFS_SIZE << BIOS_REGION.
You need to read the size of the BIOS region from SPIBAR.

 > The use of IO_APIC is in same style of RCBA (at least for
 > braswell). You mean the RCBAxx() macro style used on some other
 > platforms?

yes, like #define IOAPIC32(x) ...


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d
Gerrit-Change-Number: 29423
Gerrit-PatchSet: 3
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Patrick Rudolph <siro at das-labor.org>
Gerrit-Comment-Date: Mon, 05 Nov 2018 10:44:48 +0000
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