[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/braswell/southcluster.c: Configure IO APIC

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29423 )

Change subject: src/soc/intel/braswell/southcluster.c: Configure IO APIC
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Patch Set 3:

(2 comments)

https://review.coreboot.org/#/c/29423/3/src/soc/intel/braswell/southcluster.c
File src/soc/intel/braswell/southcluster.c:

https://review.coreboot.org/#/c/29423/3/src/soc/intel/braswell/southcluster.c@76
PS3, Line 76: CONFIG_CBFS_SIZE
That's only correct if vboot is disabled.
You need to use the whole bios region.
Is it required for proper operation ?


https://review.coreboot.org/#/c/29423/3/src/soc/intel/braswell/southcluster.c@104
PS3, Line 104: )(IO_APIC_ADDR)
Adding a macro to access IO_APIC (like the RCBA macro) would make the code more readable.



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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d
Gerrit-Change-Number: 29423
Gerrit-PatchSet: 3
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
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