[coreboot-gerrit] Change in coreboot[master]: mb/google/kahlee: Init APU_BIOS_FLASH_WP_L GPIO to reset stage
Daniel Kurtz (Code Review)
gerrit at coreboot.org
Thu May 24 02:00:46 CEST 2018
Hello Daniel Kurtz,
I'd like you to do a code review. Please visit
https://review.coreboot.org/26498
to review the following change.
Change subject: mb/google/kahlee: Init APU_BIOS_FLASH_WP_L GPIO to reset stage
......................................................................
mb/google/kahlee: Init APU_BIOS_FLASH_WP_L GPIO to reset stage
GPIO APU_BIOS_FLASH_WP_L is read in RAM stage to determine the state of
the BIOS FLASH Write Protect signal. Therefore it must be configured
as a "reset stage" GPIO, not "RAM" stage.
BUG=b:79866233
TEST=firmware_WriteProtect
Change-Id: I1d96ab4bbfeaf9db9f74cf0c58cbab2104079bf7
Signed-off-by: Daniel Kurtz <djkurtz at chromium.org>
---
M src/mainboard/google/kahlee/variants/baseboard/gpio.c
1 file changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/26498/1
diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
index 12b0e42..ff6141e 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
@@ -58,6 +58,9 @@
/* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */
PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP),
+ /* GPIO_122 - APU_BIOS_FLASH_WP_L */
+ PAD_GPI(GPIO_122, PULL_NONE),
+
/* GPIO_131 - CONFIG_STRAP3 */
PAD_GPI(GPIO_131, PULL_NONE),
@@ -111,6 +114,9 @@
/* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */
PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP),
+ /* GPIO_122 - APU_BIOS_FLASH_WP_L */
+ PAD_GPI(GPIO_122, PULL_NONE),
+
/* GPIO_131 - CONFIG_STRAP3 */
PAD_GPI(GPIO_131, PULL_NONE),
@@ -251,9 +257,6 @@
/* GPIO_119 - SPK_PA_EN */
PAD_GPO(GPIO_119, HIGH),
- /* GPIO_122 - APU_BIOS_FLASH_WP_L */
- PAD_GPI(GPIO_122, PULL_NONE),
-
/* GPIO_126 - DMIC_CLK2_EN */
PAD_GPO(GPIO_126, HIGH),
@@ -415,9 +418,6 @@
/* GPIO_119 - SPK_PA_EN */
PAD_GPO(GPIO_119, HIGH),
- /* GPIO_122 - APU_BIOS_FLASH_WP_L */
- PAD_GPI(GPIO_122, PULL_NONE),
-
/* GPIO_126 - DMIC_CLK2_EN */
PAD_GPO(GPIO_126, HIGH),
--
To view, visit https://review.coreboot.org/26498
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1d96ab4bbfeaf9db9f74cf0c58cbab2104079bf7
Gerrit-Change-Number: 26498
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Kurtz <djkurtz at google.com>
Gerrit-Reviewer: Daniel Kurtz <djkurtz at chromium.org>
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