[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy: Fix SoC I2C CLK is abnormal

[Chris Zhou (Code Review)]

Chris Zhou has uploaded this change for review. ( https://review.coreboot.org/26282


Change subject: mb/google/poppy: Fix SoC I2C CLK is abnormal
......................................................................

mb/google/poppy: Fix SoC I2C CLK is abnormal

The I2C CLKs of SoC should be 400kHz, but waveform show 460kHz to
470kHz. Add I2C parameters to adjust I2C CLKs which 5% lower than
400kHz.

BUG=b:78819970
TEST=The I2C CLKs are 5% lower than 400kHz.

Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d
Signed-off-by: Chris Zhou <chris_zhou at compal.corp-partner.google.com>
---
M src/mainboard/google/poppy/variants/nami/devicetree.cb
1 file changed, 40 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/26282/1

diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 1cc2a5e..94a859e 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -197,15 +197,52 @@
 
 	# Touchscreen
 	register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
+	register "i2c[0]" = "{
+		.speed = I2C_SPEED_FAST,
+		.speed_config[0] = {
+			.speed = I2C_SPEED_FAST,
+			.scl_lcnt = 185,
+			.scl_hcnt = 90,
+			.sda_hold = 36,
+		},
+	}"
 
 	# Trackpad
 	register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
+	register "i2c[1]" = "{
+		.early_init = 1,
+		.speed = I2C_SPEED_FAST,
+		.speed_config[0] = {
+			.speed = I2C_SPEED_FAST,
+			.scl_lcnt = 185,
+			.scl_hcnt = 90,
+			.sda_hold = 36,
+		},
+	}"
 
 	# Pen
 	register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
+	register "i2c[2]" = "{
+		.speed = I2C_SPEED_FAST,
+		.speed_config[0] = {
+			.speed = I2C_SPEED_FAST,
+			.scl_lcnt = 185,
+			.scl_hcnt = 100,
+			.sda_hold = 36,
+		},
+	}"
 
 	# Audio
 	register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
+	register "i2c[3]" = "{
+		.speed = I2C_SPEED_FAST,
+		.speed_config[0] = {
+			.speed = I2C_SPEED_FAST,
+			.scl_lcnt = 195,
+			.scl_hcnt = 90,
+			.sda_hold = 36,
+		},
+	}"
 
 	# Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
 	# communication before memory is up.
@@ -301,11 +338,11 @@
                         end
 			chip drivers/generic/gpio_keys
 				register "name" = ""PENH""
-				register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_E8)"
-				register "key.dev_name" = ""INST""
+				register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_E8)"
+				register "key.dev_name" = ""EJCT""
 				register "key.linux_code" = "SW_PEN_INSERTED"
 				register "key.linux_input_type" = "EV_SW"
-				register "key.label" = ""pen_insert""
+				register "key.label" = ""pen_eject""
 				device generic 0 on end
 			end
 		end # I2C #2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d
Gerrit-Change-Number: 26282
Gerrit-PatchSet: 1
Gerrit-Owner: Chris Zhou <chris_zhou at compal.corp-partner.google.com>
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