[coreboot-gerrit] Change in coreboot[master]: src/soc/intel: Add new device IDs

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/27522


Change subject: src/soc/intel: Add new device IDs
......................................................................

src/soc/intel: Add new device IDs

Added new device IDs for SATA, GT and Northbridge to pci_ids.h
Added entry to identify CFL U GT into systemagent.c
Added CFL CPU D0 stepping ID to mp_init.h and mp_init.c

Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed
Signed-off-by: Maulik <maulik.v.vaghela at intel.com>
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/include/intelblocks/mp_init.h
M src/soc/intel/common/block/systemagent/systemagent.c
4 files changed, 13 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/27522/1

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 40f2ea4..8e0c202 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2774,6 +2774,8 @@
 #define PCI_DEVICE_ID_INTEL_CNL_SATA		0x9dd5
 #define PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA	0x9dd7
 #define PCI_DEVICE_ID_INTEL_CNL_COMPAT_SATA	0x282a
+#define PCI_DEVICE_ID_INTEL_CNL_H_SATA		0xa352
+#define PCI_DEVICE_ID_INTEL_CNL_L_SATA		0x9dd3
 
 /* Intel PMC device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC		0x9d21
@@ -2881,6 +2883,7 @@
 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2		0x5A5A
 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3		0x5A42
 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4		0x5A4A
+#define PCI_DEVICE_ID_INTEL_CFL_GT2_ULT			0x3EA5
 
 /* Intel Northbridge Ids */
 #define PCI_DEVICE_ID_INTEL_APL_NB	0x5af0
@@ -2898,6 +2901,7 @@
 #define PCI_DEVICE_ID_INTEL_KBL_ID_DT	0x591f
 #define PCI_DEVICE_ID_INTEL_CNL_ID_U	0x5A04
 #define PCI_DEVICE_ID_INTEL_CNL_ID_Y	0x5A02
+#define PCI_DEVICE_ID_INTEL_CFL_ID_U    0x3ED0
 
 /* Intel SMBUS device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS		0x9d23
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index fd0ac99..8235aaf 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -71,6 +71,10 @@
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_A0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_B0 },
+	{ X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_B0 },
+	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_A0 },
+	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 },
+	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_D0 },
 	{ 0, 0 },
 };
 
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index 3057209..9680fbe 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -37,6 +37,10 @@
 #define CPUID_APOLLOLAKE_E0	0x506ca
 #define CPUID_GLK_A0		0x706a0
 #define CPUID_GLK_B0		0x706a1
+#define CPUID_WHISKEYLAKE_B0    0x806eb
+#define CPUID_COFFEELAKE_A0	0x906ea
+#define CPUID_COFFEELAKE_U0	0x906ea
+#define CPUID_COFFEELAKE_D0	0x806ea
 
 /*
  * MP Init callback function to Find CPU Topology. This function is common
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 54646c9..3229632 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -301,6 +301,7 @@
 	PCI_DEVICE_ID_INTEL_KBL_ID_H,
 	PCI_DEVICE_ID_INTEL_KBL_U_R,
 	PCI_DEVICE_ID_INTEL_KBL_ID_DT,
+	PCI_DEVICE_ID_INTEL_CFL_ID_U,
 	0
 };
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed
Gerrit-Change-Number: 27522
Gerrit-PatchSet: 1
Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela at intel.com>
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