[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use bootblock common stage

build bot (Jenkins) (Code Review) gerrit at coreboot.org
Wed Jul 18 00:31:00 CEST 2018


build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27518 )

Change subject: soc/intel/skylake: Use bootblock common stage
......................................................................


Patch Set 1:

(2 comments)

https://review.coreboot.org/#/c/27518/1/src/soc/intel/skylake/bootblock/bootblock.c
File src/soc/intel/skylake/bootblock/bootblock.c:

https://review.coreboot.org/#/c/27518/1/src/soc/intel/skylake/bootblock/bootblock.c@150
PS1, Line 150: 	pci_write_config32(PCH_DEV_SMBUS, TCOBASE, TCO_BASE_ADDDRESS);
'ADDDRESS' may be misspelled - perhaps 'ADDRESS'?


https://review.coreboot.org/#/c/27518/1/src/soc/intel/skylake/bootblock/bootblock.c@159
PS1, Line 159: 	pcr_write32(PID_DMI, PCR_DMI_TCOBASE, TCO_BASE_ADDDRESS | (1 << 1));
'ADDDRESS' may be misspelled - perhaps 'ADDRESS'?



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I46cb6bc6f6c6b97243f7d40457fd02d4ef7b8933
Gerrit-Change-Number: 27518
Gerrit-PatchSet: 1
Gerrit-Owner: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 17 Jul 2018 22:31:00 +0000
Gerrit-HasComments: Yes
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