[coreboot-gerrit] Change in coreboot[master]: commonlib/timestamp_serialized: Add AGESA timestamp descriptions

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/28271


Change subject: commonlib/timestamp_serialized: Add AGESA timestamp descriptions
......................................................................

commonlib/timestamp_serialized: Add AGESA timestamp descriptions

BUG=b:64549506
TEST=tried cbmem -t on grunt

Change-Id: Ib47112bdf9601bcd51b7ff7f84d948d5bb6537cf
Signed-off-by: Raul E Rangel <rrangel at chromium.org>
---
M src/commonlib/include/commonlib/timestamp_serialized.h
1 file changed, 96 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/28271/1

diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
index 304e43f..0b53cea 100644
--- a/src/commonlib/include/commonlib/timestamp_serialized.h
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -258,6 +258,102 @@
 	{ TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" },
 	{ TS_FSP_AFTER_END_OF_FIRMWARE,
 		"returning from FspNotify(EndOfFirmware)" },
+
+	/* AMD AGESA internal timestamps. See IdsPerf.h */
+	{ 0x1100, "BeginProcAmdInitEarly" },
+	{ 0x1101, "EndProcAmdInitEarly" },
+	{ 0x1102, "BeginAmdTopoInitialize" },
+	{ 0x1103, "EndAmdTopoInitialize" },
+	{ 0x1104, "BeginGnbInitAtEarlier" },
+	{ 0x1105, "EndGnbInitAtEarlier" },
+	{ 0x1106, "BeginAmdCpuEarly" },
+	{ 0x1107, "EndAmdCpuEarly" },
+	{ 0x1108, "BeginGnbInitAtEarly" },
+	{ 0x1109, "EndGnbInitAtEarly" },
+	{ 0x110A, "BeginProcAmdInitEnv" },
+	{ 0x110B, "EndProcAmdInitEnv" },
+	{ 0x110C, "BeginInitEnv" },
+	{ 0x110D, "EndInitEnv" },
+	{ 0x110E, "BeginGnbInitAtEnv" },
+	{ 0x110F, "EndGnbInitAtEnv" },
+	{ 0x1110, "BeginProcAmdInitLate" },
+	{ 0x1111, "EndProcAmdInitLate" },
+	{ 0x1112, "BeginCreatSystemTable" },
+	{ 0x1113, "EndCreatSystemTable" },
+	{ 0x1114, "BeginDispatchCpuFeaturesLate" },
+	{ 0x1115, "EndDispatchCpuFeaturesLate" },
+	{ 0x1116, "BeginAmdCpuLate" },
+	{ 0x1117, "EndAmdCpuLate" },
+	{ 0x1118, "BeginGnbInitAtLate" },
+	{ 0x1119, "EndGnbInitAtLate" },
+	{ 0x111A, "BeginProcAmdInitMid" },
+	{ 0x111B, "EndProcAmdInitMid" },
+	{ 0x111E, "BeginInitMid" },
+	{ 0x111F, "EndInitMid" },
+	{ 0x1120, "BeginGnbInitAtMid" },
+	{ 0x1121, "EndGnbInitAtMid" },
+	{ 0x1122, "BeginProcAmdInitPost" },
+	{ 0x1123, "EndProcAmdInitPost" },
+	{ 0x1124, "BeginGnbInitAtPost" },
+	{ 0x1125, "EndGnbInitAtPost" },
+	{ 0x1126, "BeginAmdMemAuto" },
+	{ 0x1127, "EndAmdMemAuto" },
+	{ 0x1128, "BeginAmdCpuPost" },
+	{ 0x1129, "EndAmdCpuPost" },
+	{ 0x112A, "BeginGnbInitAtPostAfterDram" },
+	{ 0x112B, "EndGnbInitAtPostAfterDram" },
+	{ 0x112C, "BeginProcAmdInitReset" },
+	{ 0x112D, "EndProcAmdInitReset" },
+	{ 0x112E, "BeginInitReset" },
+	{ 0x112F, "EndInitReset" },
+	{ 0x1130, "BeginHtInitReset" },
+	{ 0x1131, "EndHtInitReset" },
+	{ 0x1132, "BeginProcAmdInitResume" },
+	{ 0x1133, "EndProcAmdInitResume" },
+	{ 0x1134, "BeginAmdMemS3Resume" },
+	{ 0x1135, "EndAmdMemS3Resume" },
+	{ 0x1136, "BeginDispatchCpuFeaturesS3Resume" },
+	{ 0x1137, "EndDispatchCpuFeaturesS3Resume" },
+	{ 0x1138, "BeginSetCoresTscFreqSel" },
+	{ 0x1139, "EndSetCoresTscFreqSel" },
+	{ 0x113A, "BeginMemFMctMemClr_Init" },
+	{ 0x113B, "EndnMemFMctMemClr_Init" },
+	{ 0x113C, "BeginMemBeforeMemDataInit" },
+	{ 0x113D, "EndMemBeforeMemDataInit" },
+	{ 0x113E, "BeginProcAmdMemAuto" },
+	{ 0x113F, "EndProcAmdMemAuto" },
+	{ 0x1140, "BeginMemMFlowC32" },
+	{ 0x1141, "EndMemMFlowC32" },
+	{ 0x1142, "BeginMemInitializeMCT" },
+	{ 0x1143, "EndMemInitializeMCT" },
+	{ 0x1144, "BeginMemSystemMemoryMapping" },
+	{ 0x1145, "EndMemSystemMemoryMapping" },
+	{ 0x1146, "BeginMemDramTraining" },
+	{ 0x1147, "EndMemDramTraining" },
+	{ 0x1148, "BeginMemOtherTiming" },
+	{ 0x1149, "EndMemOtherTiming" },
+	{ 0x114A, "BeginMemUMAMemTyping" },
+	{ 0x114B, "EndMemUMAMemTyping" },
+	{ 0x114C, "BeginMemMemClr" },
+	{ 0x114D, "EndMemMemClr" },
+	{ 0x114E, "BeginMemMFlowTN" },
+	{ 0x114F, "EndMemMFlowTN" },
+	{ 0x1150, "BeginAgesaHookBeforeDramInit" },
+	{ 0x1151, "EndAgesaHookBeforeDramInit" },
+	{ 0x1152, "BeginProcMemDramTraining" },
+	{ 0x1153, "EndProcMemDramTraining" },
+	{ 0x1154, "BeginGnbInitAtRtb" },
+	{ 0x1155, "EndGnbInitAtRtb" },
+	{ 0x1156, "BeginGnbLoadScsData" },
+	{ 0x1157, "EndGnbLoadScsData" },
+	{ 0x1158, "BeginGnbPcieTraining" },
+	{ 0x1159, "EndGnbPcieTraining" },
+	{ 0x115A, "BeginDispatchCpuFeaturesInitRtb" },
+	{ 0x115B, "EndDispatchCpuFeaturesInitRtb" },
+	{ 0x115C, "BeginAmdCpuEarly" },
+	{ 0x115D, "EndAmdCpuEarly" },
+	{ 0x115E, "BeginAmdGnbMidLate" },
+	{ 0x115F, "EndAmdGnbMidLate" },
 };
 
 #endif

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib47112bdf9601bcd51b7ff7f84d948d5bb6537cf
Gerrit-Change-Number: 28271
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel <rrangel at chromium.org>
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