<p>Raul Rangel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28271">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">commonlib/timestamp_serialized: Add AGESA timestamp descriptions<br><br>BUG=b:64549506<br>TEST=tried cbmem -t on grunt<br><br>Change-Id: Ib47112bdf9601bcd51b7ff7f84d948d5bb6537cf<br>Signed-off-by: Raul E Rangel <rrangel@chromium.org><br>---<br>M src/commonlib/include/commonlib/timestamp_serialized.h<br>1 file changed, 96 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/28271/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h</span><br><span>index 304e43f..0b53cea 100644</span><br><span>--- a/src/commonlib/include/commonlib/timestamp_serialized.h</span><br><span>+++ b/src/commonlib/include/commonlib/timestamp_serialized.h</span><br><span>@@ -258,6 +258,102 @@</span><br><span> { TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" },</span><br><span> { TS_FSP_AFTER_END_OF_FIRMWARE,</span><br><span> "returning from FspNotify(EndOfFirmware)" },</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* AMD AGESA internal timestamps. See IdsPerf.h */</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1100, "BeginProcAmdInitEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1101, "EndProcAmdInitEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1102, "BeginAmdTopoInitialize" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1103, "EndAmdTopoInitialize" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1104, "BeginGnbInitAtEarlier" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1105, "EndGnbInitAtEarlier" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1106, "BeginAmdCpuEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1107, "EndAmdCpuEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1108, "BeginGnbInitAtEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1109, "EndGnbInitAtEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x110A, "BeginProcAmdInitEnv" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x110B, "EndProcAmdInitEnv" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x110C, "BeginInitEnv" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x110D, "EndInitEnv" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x110E, "BeginGnbInitAtEnv" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x110F, "EndGnbInitAtEnv" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1110, "BeginProcAmdInitLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1111, "EndProcAmdInitLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1112, "BeginCreatSystemTable" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1113, "EndCreatSystemTable" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1114, "BeginDispatchCpuFeaturesLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1115, "EndDispatchCpuFeaturesLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1116, "BeginAmdCpuLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1117, "EndAmdCpuLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1118, "BeginGnbInitAtLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1119, "EndGnbInitAtLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x111A, "BeginProcAmdInitMid" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x111B, "EndProcAmdInitMid" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x111E, "BeginInitMid" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x111F, "EndInitMid" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1120, "BeginGnbInitAtMid" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1121, "EndGnbInitAtMid" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1122, "BeginProcAmdInitPost" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1123, "EndProcAmdInitPost" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1124, "BeginGnbInitAtPost" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1125, "EndGnbInitAtPost" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1126, "BeginAmdMemAuto" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1127, "EndAmdMemAuto" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1128, "BeginAmdCpuPost" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1129, "EndAmdCpuPost" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x112A, "BeginGnbInitAtPostAfterDram" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x112B, "EndGnbInitAtPostAfterDram" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x112C, "BeginProcAmdInitReset" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x112D, "EndProcAmdInitReset" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x112E, "BeginInitReset" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x112F, "EndInitReset" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1130, "BeginHtInitReset" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1131, "EndHtInitReset" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1132, "BeginProcAmdInitResume" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1133, "EndProcAmdInitResume" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1134, "BeginAmdMemS3Resume" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1135, "EndAmdMemS3Resume" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1136, "BeginDispatchCpuFeaturesS3Resume" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1137, "EndDispatchCpuFeaturesS3Resume" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1138, "BeginSetCoresTscFreqSel" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1139, "EndSetCoresTscFreqSel" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x113A, "BeginMemFMctMemClr_Init" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x113B, "EndnMemFMctMemClr_Init" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x113C, "BeginMemBeforeMemDataInit" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x113D, "EndMemBeforeMemDataInit" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x113E, "BeginProcAmdMemAuto" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x113F, "EndProcAmdMemAuto" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1140, "BeginMemMFlowC32" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1141, "EndMemMFlowC32" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1142, "BeginMemInitializeMCT" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1143, "EndMemInitializeMCT" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1144, "BeginMemSystemMemoryMapping" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1145, "EndMemSystemMemoryMapping" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1146, "BeginMemDramTraining" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1147, "EndMemDramTraining" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1148, "BeginMemOtherTiming" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1149, "EndMemOtherTiming" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x114A, "BeginMemUMAMemTyping" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x114B, "EndMemUMAMemTyping" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x114C, "BeginMemMemClr" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x114D, "EndMemMemClr" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x114E, "BeginMemMFlowTN" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x114F, "EndMemMFlowTN" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1150, "BeginAgesaHookBeforeDramInit" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1151, "EndAgesaHookBeforeDramInit" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1152, "BeginProcMemDramTraining" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1153, "EndProcMemDramTraining" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1154, "BeginGnbInitAtRtb" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1155, "EndGnbInitAtRtb" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1156, "BeginGnbLoadScsData" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1157, "EndGnbLoadScsData" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1158, "BeginGnbPcieTraining" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x1159, "EndGnbPcieTraining" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x115A, "BeginDispatchCpuFeaturesInitRtb" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x115B, "EndDispatchCpuFeaturesInitRtb" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x115C, "BeginAmdCpuEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x115D, "EndAmdCpuEarly" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x115E, "BeginAmdGnbMidLate" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { 0x115F, "EndAmdGnbMidLate" },</span><br><span> };</span><br><span> </span><br><span> #endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28271">change 28271</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28271"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib47112bdf9601bcd51b7ff7f84d948d5bb6537cf </div>
<div style="display:none"> Gerrit-Change-Number: 28271 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Raul Rangel <rrangel@chromium.org> </div>