[coreboot-gerrit] Change in coreboot[master]: src/northbridge: Fix typo

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27911 )

Change subject: src/northbridge: Fix typo
......................................................................


Patch Set 1:

(7 comments)

https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdfam10/amdfam10.h
File src/northbridge/amd/amdfam10/amdfam10.h:

https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdfam10/amdfam10.h@371
PS1, Line 371:    for DDR2 400, 533, 667, F2x[1,0]9C_x[02:01], [03], [06:05], [07] control timing of all DIMMs
line over 80 characters


https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdfam10/amdfam10.h@372
PS1, Line 372:    for DDR2 800, DDR3 800, 1067, 1333, 1600, F2x[1,0]9C_x[02:01], [03], [06:05], [07] control timing of DIMM0
line over 80 characters


https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdfam10/amdfam10.h@373
PS1, Line 373: 					     F2x[1,0]9C_x[102:101], [103], [106:105], [107] control timing of DIMM1
line over 80 characters


https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdht/h3ffeat.h
File src/northbridge/amd/amdht/h3ffeat.h:

https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdht/h3ffeat.h@160
PS1, Line 160: 	/* The number of coherent links coming off of each node (i.e. the 'Degree' of the node) */
line over 80 characters


https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdht/h3ncmn.c
File src/northbridge/amd/amdht/h3ncmn.c:

https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdht/h3ncmn.c@1119
PS1, Line 1119:  *					InitComplete = 1,Link initialization is complete
line over 80 characters


https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c
File src/northbridge/amd/amdmct/mct_ddr3/s3utils.c:

https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@849
PS1, Line 849: 				/* Restore DRAM Address/Timing Control Register */
line over 80 characters


https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdmct/wrappers/mcti_d.c
File src/northbridge/amd/amdmct/wrappers/mcti_d.c:

https://review.coreboot.org/#/c/27911/1/src/northbridge/amd/amdmct/wrappers/mcti_d.c@172
PS1, Line 172: 		//val = 1;	/* Ignore faulty SPD checksum (DIMM will still be disabled), continue current node initialization */
line over 80 characters



-- 
To view, visit https://review.coreboot.org/27911
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I00094028036f33892362b935899e1bceef1da625
Gerrit-Change-Number: 27911
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-CC: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 07 Aug 2018 10:27:36 +0000
Gerrit-HasComments: Yes
Gerrit-HasLabels: No
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180807/b7354ca5/attachment.html>