[coreboot-gerrit] Change in coreboot[master]: device/dram/ddr2: Fix decoding tRR

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21457


Change subject: device/dram/ddr2: Fix decoding tRR
......................................................................

device/dram/ddr2: Fix decoding tRR

Bit 7 should not be used in computation.

Change-Id: I6a698ec9c15a2611a34c5965edf93638553775f0
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/device/dram/ddr2.c
1 file changed, 4 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/21457/1

diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c
index 326b141..babfad7 100644
--- a/src/device/dram/ddr2.c
+++ b/src/device/dram/ddr2.c
@@ -179,8 +179,11 @@
  */
 static u32 spd_decode_tRR_time(u8 c)
 {
-	switch (c) {
+	switch (c & ~0x80) {
 	default:
+		printk(BIOS_DEBUG,
+			"Unkown tRR value, using default of 15.6us.");
+		/* Fallthrough */
 	case 0:
 		return 15625 << 8;
 	case 1:

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6a698ec9c15a2611a34c5965edf93638553775f0
Gerrit-Change-Number: 21457
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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