[coreboot-gerrit] Patch merged into coreboot/master: intel/skylake: Add function to read state of Deep S5

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit cb76d50f0d15eada406e51a096d78553e3d4184e
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Mar 7 19:03:50 2017 -0800

    intel/skylake: Add function to read state of Deep S5
    
    Add a function to read the current state of Deep S5 configuration
    and indicate if it is enabled (for AC and/or DC) or disabled.
    
    This is similar to the existing function that checks Deep S3
    enable state.
    
    BUG=b:36042662
    BRANCH=none
    TEST=tested with subsequent commits to check Deep S5 state at boot
    and filter event log messages if it is enabled.
    
    Change-Id: I4b60fb99a99952cb3ca6be29f257bb5894ff5a52
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/18663
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/18663 for details.

-gerrit