[coreboot-gerrit] Patch merged into coreboot/master: intel/skylake: Add devicetree settings for acoustic noise mitigation

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit b2aac8503019aad122983c0b60635357e9087b9c
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Mar 7 19:12:02 2017 -0800

    intel/skylake: Add devicetree settings for acoustic noise mitigation
    
    Add options to the skylake chip config that will allow tuning the
    various settings that can affect acoustics with the CPU and its VRs.
    
    These settings are applied inside FSP, and they can adjust the slew
    slew rate when changing voltages or disable fast C-state ramping on
    the various CPU VR rails.
    
    BUG=b:35581264
    BRANCH=none
    TEST=these are currently unused, but I verified that enabling the
    options can affect the acoustics of a system at runtime.
    
    Change-Id: I6a8ec0b8d3bd38b330cb4836bfa5bbbfc87dc3fb
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/18662
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Tested-by: build bot (Jenkins)


See https://review.coreboot.org/18662 for details.

-gerrit