[coreboot-gerrit] Patch merged into coreboot/master: google/eve: Configure GPIOs for new board

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 03df460af5f73bb2fbbe23caff5f0bb646e8f756
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Mar 7 18:59:19 2017 -0800

    google/eve: Configure GPIOs for new board
    
    A new board revision is making use of two previously unused GPIOs
    to drive BOOT/RESET pins to an on-board MCU.
    
    The reset pin is open drain so it is set as input by default, and
    the boot pin is driven low by default.
    
    Since these are UART0 pins they also need to be set up again after
    executing FSP-S as it will change them back to native mode pins.
    
    BUG=b:36025702
    BRANCH=none
    TEST=manual testing on reworked board, toggling GPIOs to put
    the MCU into programming mode.
    
    Change-Id: Id6f0ef2f863bc1e873b58e344446038786b59d25
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/18661
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Tested-by: build bot (Jenkins)


See https://review.coreboot.org/18661 for details.

-gerrit