[coreboot-gerrit] New patch to review for coreboot: mainboard/google/reef: set i2c bus timings by rise/fall times

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17397

-gerrit

commit 9b045ceee0f61ffee7f1dfa76216d342f3d58f77
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Nov 11 17:28:35 2016 -0600

    mainboard/google/reef: set i2c bus timings by rise/fall times
    
    Provide the rise and fall times for the i2c buses and let the
    library perform the necessary calculations for the i2c
    controller registers instead of manually tuning the values.
    
    BUG=chrome-os-partner:58889,chrome-os-partner:59565
    
    Change-Id: I0c84658471d90309cdbb850e3128ae01780633af
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 .../google/reef/variants/baseboard/devicetree.cb   | 31 +++++++---------------
 1 file changed, 9 insertions(+), 22 deletions(-)

diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index 278cc57..6facf30 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -71,39 +71,26 @@ chip soc/intel/apollolake
 	register "gpe0_dw2" = "PMC_GPE_N_63_32"
 	register "gpe0_dw3" = "PMC_GPE_SW_31_0"
 
-	# Enable I2C2 bus early for TPM access and configure as 400kHz
-	# with manually tuned values.
+	# Enable I2C2 bus early for TPM at 400kHz
 	register "i2c[2]" = "{
 		.early_init = 1,
 		.speed = I2C_SPEED_FAST,
-		.speed_config[0] = {
-			.speed = I2C_SPEED_FAST,
-			.scl_lcnt = 0xd0,
-			.scl_hcnt = 0x68,
-			.sda_hold = 0x27,
-		}
+		.rise_time_ns = 57,
+		.fall_time_ns = 28,
 	}"
 
-	# Limit trackpad speed to 400kHz with manually tuned values.
+	# trackpad at 400kHz
 	register "i2c[4]" = "{
 		.speed = I2C_SPEED_FAST,
-		.speed_config[0] = {
-			.speed = I2C_SPEED_FAST,
-			.scl_lcnt = 0xd0,
-			.scl_hcnt = 0x68,
-			.sda_hold = 0x27,
-		}
+		.rise_time_ns = 114,
+		.fall_time_ns = 164,
 	}"
 
-	# Limit digitizer speed to 400kHz with manually tuned values.
+	# digitizer at 400kHz
 	register "i2c[5]" = "{
 		.speed = I2C_SPEED_FAST,
-		.speed_config[0] = {
-			.speed = I2C_SPEED_FAST,
-			.scl_lcnt = 0xd0,
-			.scl_hcnt = 0x68,
-			.sda_hold = 0x27,
-		}
+		.rise_time_ns = 152,
+		.fall_time_ns = 30,
 	}"
 
 	# Minimum SLP S3 assertion width 28ms.