[coreboot-gerrit] Patch merged into coreboot/master: rockchip: rk3399: support basic clock driver

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit a1f82a349820e9b0b58031eb70a9a9ff744bbc95
Author: Lin Huang <hl at rock-chips.com>
Date:   Wed Mar 9 18:08:20 2016 +0800

    rockchip: rk3399: support basic clock driver
    
    This patch initialize the PLL clocks and add function to
    configure cpu freq. Right now, we set the little cpu freq to 600MHz.
    
    In coreboot, we currently care about these four PLLs,
    o. APLL for cpu clk, where A stands for AXI,
    o. CPLL and GPLL are the generic PLL mainly for peripheral clk,
    o. PPLL is only PMU clk.
    
    For the peripheral clocks, there are thress clocks named as,
     aclk_perihp,
     aclk_perilp0,
     hclk_perilp1,
    where the 'h' and 'l' letters refer to High and Low speed.
    As the diagram below, the aclk_perihp always be the parent of
    more higher speed peripheral devices like pcie, and
    hclk_perilp1 for spi, i2c, aclk_perilp0 for crypto.
    These three clocks can choose parent from GPLL or CPLL freely,
    in this patch, they are all sourced from GPLL.
    
    GPLL(594M)/CPLL(384M)                      APLL(600M for little core)
       |                                           |
       `-- aclk_perihp                             `-- clk_core(600M == APLL)
       |       |                                           |
       |       `-- periph_aclk(148.5M)                     `-- atclk_core(300M)
       |       `-- periph_hclk(148.5M)                     `-- aclkm_core(300M)
       |       `-- periph_pclk(37.125M)                    `-- pclk_dbg_core(100M)
       |
       `-- hclk_perilp1
       |       |
       |       `-- periph_hclk(99M)            PPLL(594M)
       |       `-- periph_pclk(49.5M)              |
       |                                           `-- pmu_pclk(99M)
       `-- aclk_perilp0
               |
               `-- periph_aclk(99M)
               `-- periph_hclk(99M)
               `-- periph_pclk(49.5M)
    
    BRANCH=none
    BUG=chrome-os-partner:51537
    TEST=emerge-kevin coreboot
    
    Change-Id: I1c46ff17e6b466529244afb41d7fd4abbcfd3da4
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 9f0d31177336a3450577950426f9cc9d56e2254c
    Original-Change-Id: I4ad00df3e406bd0a7576287d6e62b8993a8c2d02
    Original-Signed-off-by: Lin Huang <hl at rock-chips.com>
    Original-Signed-off-by: Shunqian Zheng <zhengsq at rock-chips.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/332386
    Original-Commit-Ready: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
    Reviewed-on: https://review.coreboot.org/14706
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See https://review.coreboot.org/14706 for details.

-gerrit