[coreboot-gerrit] New patch to review for coreboot: intel model_106cx: Include CAR from socket directory

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15757

-gerrit

commit 0282110921eaad3416f30389b0da0696103e612a
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed Jul 20 08:50:38 2016 +0300

    intel model_106cx: Include CAR from socket directory
    
    Since the socket layer is implemented with this CPU model, there
    could potentially be multiple CPU models included.  There can be
    only one cache_as_ram include, so select it directly within
    the socket directory.
    
    Change-Id: Ia52bb152276eddfd1fb33ddb7f5d153ab8e8163c
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/intel/model_106cx/Makefile.inc     | 2 --
 src/cpu/intel/socket_441/Makefile.inc      | 3 +++
 src/cpu/intel/socket_FCBGA559/Makefile.inc | 3 +++
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc
index d15c362..720052d 100644
--- a/src/cpu/intel/model_106cx/Makefile.inc
+++ b/src/cpu/intel/model_106cx/Makefile.inc
@@ -1,6 +1,4 @@
 ramstage-y += model_106cx_init.c
 subdirs-y += ../../x86/name
 
-cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
-romstage-y += ../car/romstage.c
 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin
diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc
index cc1aa56..dbf300b 100644
--- a/src/cpu/intel/socket_441/Makefile.inc
+++ b/src/cpu/intel/socket_441/Makefile.inc
@@ -7,3 +7,6 @@ subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 subdirs-y += ../speedstep
+
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
+romstage-y += ../car/romstage.c
diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc
index e36c8b1..082c472 100644
--- a/src/cpu/intel/socket_FCBGA559/Makefile.inc
+++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc
@@ -6,3 +6,6 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
+
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
+romstage-y += ../car/romstage.c