[coreboot-gerrit] Patch merged into coreboot/master: intel/amenia: Add GPE routing settings

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 6e5c5a15bc9fe709943598ede0eb52f9766cbb02
Author: Shaunak Saha <shaunak.saha at intel.com>
Date:   Fri Jun 10 19:36:49 2016 -0700

    intel/amenia: Add GPE routing settings
    
    This patch sets the devicetree for gpe0_dw configuration
    and also configures the GPIO lines for SCI. EC_SCI_GPI
    is configured to proper value.
    
    BUG = chrome-os-partner:53438
    TEST = Toggle pch_sci_l from ec console using gpioset command
           and see that the sci counter increases in /sys/firmware/acpi/interrupt
           and also 9 in /proc/interrupt
    
    Change-Id: I3ae9ef7c6a3c8688bcb6cb4c73f5618e7cde342c
    Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
    Reviewed-on: https://review.coreboot.org/15325
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/15325 for details.

-gerrit