[coreboot-gerrit] Patch merged into coreboot/master: google/reef: Add GPE routing settings
gerrit at coreboot.org
gerrit at coreboot.org
Tue Jul 12 20:39:42 CEST 2016
the following patch was just integrated into master:
commit 066e0f392378fbb7e1628af937e88f86e1279158
Author: Shaunak Saha <shaunak.saha at intel.com>
Date: Wed Jul 6 15:50:48 2016 -0700
google/reef: Add GPE routing settings
This patch sets the devicetree for gpe0_dw configuration
and also configures the GPIO lines for SCI. EC_SCI_GPI
is configured to proper value.
BUG = chrome-os-partner:53438
TEST = Toggle pch_sci_l from ec console using gpioset command
and see that the sci counter increases in /sys/firmware/acpi/interrupt
and also 9 in /proc/interrupt
Change-Id: If258bece12768edb1e612c982514ce95c756c438
Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
Reviewed-on: https://review.coreboot.org/15556
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/15556 for details.
-gerrit
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