[coreboot-gerrit] New patch to review for coreboot: intel/i82801ax: Fix IDE setup console log

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14361

-gerrit

commit 508cfb54b771bb79023250a58c61b504e49819bc
Author: Patrick Georgi <pgeorgi at chromium.org>
Date:   Thu Apr 14 12:35:09 2016 +0200

    intel/i82801ax: Fix IDE setup console log
    
    Fixes two issues:
    1. In (the unlikely) case that dev->chip_info is NULL, the output was
       depending on an unknown value near the start of the address space.
    2. Output for the secondary interface actually printed the primary
       interface's configuration.
    
    Change-Id: Id0f499a85e6e2410b4efd63baf7fffb2fcaa3103
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
---
 src/southbridge/intel/i82801ax/ide.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/intel/i82801ax/ide.c b/src/southbridge/intel/i82801ax/ide.c
index dcdfe55..6fdcacd 100644
--- a/src/southbridge/intel/i82801ax/ide.c
+++ b/src/southbridge/intel/i82801ax/ide.c
@@ -35,7 +35,7 @@ static void ide_init(struct device *dev)
 	if (!conf || conf->ide0_enable)
 		reg16 |= IDE_DECODE_ENABLE;
 	printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Primary",
-	       conf->ide0_enable ? "on" : "off");
+	       (reg16 & IDE_DECODE_ENABLE) ? "on" : "off");
 	pci_write_config16(dev, IDE_TIM_PRI, reg16);
 
 	reg16 = pci_read_config16(dev, IDE_TIM_SEC);
@@ -43,7 +43,7 @@ static void ide_init(struct device *dev)
 	if (!conf || conf->ide1_enable)
 		reg16 |= IDE_DECODE_ENABLE;
 	printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Secondary",
-	       conf->ide0_enable ? "on" : "off");
+	       (reg16 & IDE_DECODE_ENABLE) ? "on" : "off");
 	pci_write_config16(dev, IDE_TIM_SEC, reg16);
 }